Analog Devices Inc./Maxim Integrated DS1706TEPA

Overview

DS1706TEPA from Maxim Integrated is a 3.3V ±5% precision microprocessor supervisory circuit with active-low reset (/RST), watchdog status output (/WDS), non-maskable interrupt (NMI), and pushbutton reset debouncing - designed for industrial embedded systems requiring reliable power-up/power-down sequencing, early power-fail warning, and software execution monitoring. It operates across -40°C to +85°C in 8-pin PDIP packaging.

For engineers reviewing the DS1706TEPA datasheet, DS1706TEPA pinout, DS1706TEPA application, or DS1706TEPA equivalent, key selection criteria include VCC trip point accuracy (4.25V–4.50V), 130ms minimum reset pulse width, 1s watchdog timeout, NMI response latency (<8µs), and compatibility with 3.3V microcontroller supply rails and external voltage sense points.

Technical Context

The DS1706TEPA integrates three independent monitoring functions: (1) precision VCC supervision with 5% tolerance at 3.3V (VCCTP = 4.25–4.50V), (2) high-impedance IN pin sensing referenced to 1.25V internal bandgap for customizable upstream voltage monitoring, and (3) strobe-driven watchdog timer with 1.0–2.2s timeout window and 130ms /WDS active-low pulse on timeout.

Its reset logic asserts /RST low during VCC undervoltage, power-up, or PBRST activation - all guaranteed ≥130ms duration. The NMI output pulses low for ≥200µs when IN falls below 1.25V, with 100µV hysteresis and 5µs noise immunity, enabling controlled system shutdown before reset assertion.

Key Specifications

Pinout & Package

DS1706TEPA is supplied in an 8-pin plastic DIP (300-mil) package with through-hole mounting and industry-standard footprint.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar microprocessor supervisory applications.

Compared with MAX706ESA and TPS3808G12DBVR, DS1706TEPA uniquely delivers 3.3V ±5% accuracy with integrated NMI, PBRST debouncing, and watchdog status - making it optimal for industrial 3.3V systems needing coordinated power-fail response and firmware health monitoring without added components.

Availability

DS1706TEPA is available at Aetrix Electronics and suitable for industrial automation, medical diagnostics, smart metering, and outdoor wireless infrastructure requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for DS1706TEPA includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) is a semiconductor company specializing in high-performance analog, mixed-signal, and power management ICs for industrial, automotive, communications, and computing markets.

The DS1706TEPA belongs to Maxim's MicroMonitor family - engineered specifically for robust microprocessor supervision in harsh environments where power integrity, early fault detection, and deterministic reset timing are mission-critical.

FAQ

What is the exact VCC trip point range for DS1706TEPA?

The DS1706TEPA has a specified VCC trip point (VCCTP) of 4.25V minimum, 4.40V typical, and 4.50V maximum - calibrated for 3.3V ±5% system monitoring. This range ensures /RST activates before the 3.3V rail falls below the operational threshold of most 3.3V microcontrollers, and is verified across the full -40°C to +85°C temperature range. DS1706TEPA's trip point is distinct from other DS1706 variants like DS1706T (3.0V system) or DS1706P (3.3V ±20%).

Does DS1706TEPA provide both active-high and active-low reset outputs?

No, DS1706TEPA provides only an active-low reset output (/RST) and an active-low watchdog status output (/WDS). It does not include the active-high RST output found on DS1706LEPA or DS1706PEPA variants. The part marking "TEPA" explicitly denotes /RST and /WDS configuration per Maxim's ordering table - confirming single-polarity reset signaling compatible with standard microcontroller reset inputs.

How does the DS1706TEPA watchdog timer interact with the /RST signal?

The DS1706TEPA watchdog timer operates independently of /RST assertion: its timeout begins only after /RST becomes inactive (i.e., goes high), and it drives /WDS low upon expiration. /RST itself is triggered solely by VCC undervoltage, power-up, or PBRST activation - not by watchdog timeout. This separation allows systems to use /WDS for diagnostic logging or secondary recovery actions while relying on /RST for primary processor reset, as confirmed in the DS1706 functional description and timing diagrams.

Can the IN pin of DS1706TEPA monitor voltages higher than VCC?

Yes, the IN pin can monitor voltages higher than VCC using an external resistor divider, as long as the resulting voltage at IN stays within 0V to VCC and the input current remains below 10mA. The internal 1.25V comparator reference enables scaling - for example, a 12V rail can be sensed using R1=26kΩ and R2=10kΩ per Maxim's Figure 5 calculation. This capability is explicitly documented for DS1706TEPA in the IN pin specifications and absolute maximum ratings.

Is DS1706TEPA pin-compatible with the MAX706 series?

Yes, DS1706TEPA is pin-compatible with the MAX705/MAX706 in 8-pin DIP, SOIC, and µSOP packages, as stated in the "Pin-compatible with the MAXIM MAX705/MAX706" feature list. However, electrical differences exist: DS1706TEPA targets 3.3V ±5% systems (VCCTP = 4.25–4.50V), whereas MAX706 is specified for 5V ±5% (VCCTP = 4.50–4.75V). Direct substitution requires verification that the 3.3V trip point meets system requirements - the pinout alignment enables drop-in replacement only when voltage thresholds align.