My Inquiry
My Account
Analog Devices Inc./Maxim Integrated DS1707ESA/T&R
- Part No.:
- DS1707ESA/T&R
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Supervisors
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
DS1707ESA/T&R.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 8SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:3,086
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
DS1707ESA/T&R from Maxim Integrated is a 5V ±5% microprocessor supervisory circuit that monitors VCC, senses external voltage via IN pin, and debounces pushbutton reset input (PBRST). It provides active-low and active-high reset outputs (RST and RST), non-maskable interrupt (NMI), and operates across -40°C to +85°C. Used in embedded systems requiring reliable power-up sequencing and early power-fail warning.
For engineers reviewing the DS1707ESA/T&R datasheet, DS1707ESA/T&R pinout, DS1707ESA/T&R application, or DS1707ESA/T&R equivalent, key selection criteria include VCC trip point (4.50–4.75 V), 130 ms minimum reset pulse width, NMI timing (200 µs pulse, 5 µs noise immunity), and SOIC-8 industrial-grade packaging with T&R delivery format.
Technical Context
The DS1707ESA/T&R implements a dual-threshold monitoring architecture: one comparator tracks VCC directly for reset assertion at VCCTP = 4.50–4.75 V; another compares the IN pin voltage against a 1.25 V internal reference for user-defined supply sensing. Both comparators feature built-in hysteresis (100 µV on IN, implicit on VCC) and noise rejection (5 µs minimum glitch rejection).
Its reset logic guarantees tRST ≥ 130 ms on power-up and power-down, while NMI asserts for ≥200 µs upon IN voltage decay below VTP. The PBRST input is internally pulled up (40 kΩ typical) and debounced to generate guaranteed 130 ms reset pulses upon button release - independent of mechanical bounce duration.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Trip Point | 4.50–4.75 V; precise threshold for 5V ±5% system reset initiation |
| Reset Pulse Width | 130–285 ms; ensures full microprocessor stabilization before release |
| NMI Pulse Width | ≥200 µs; provides deterministic early warning before reset activation |
| IN Trip Voltage | 1.20–1.30 V; enables flexible external supply monitoring via resistor divider |
| Supply Current | 60 µA max at VCC < 5.5 V; supports low-power always-on supervision |
| Operating Temp | -40°C to +85°C; qualified for industrial environment deployment |
| Package | 8-pin SOIC (150-mil); surface-mount compatible with standard reflow profiles |
Pinout & Package
DS1707ESA/T&R is housed in an 8-pin SOIC (150-mil) package with gull-wing leads, JEDEC MS-012AC compliant, 1.75 mm height, and RoHS-compliant finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PBRST | Pushbutton Reset Input | Active-low, internally pulled up (40 kΩ); debounced to guarantee ≥130 ms reset pulse on release |
| VCC | Power Supply Input | Monitored supply rail; trip point 4.50–4.75 V for 5V ±5% operation |
| GND | Ground Reference | Analog and digital ground common return; required for comparator reference stability |
| IN | Voltage Sense Input | High-impedance (≤1 µA leakage) input referenced to 1.25 V bandgap; supports external divider for custom trip points |
| RST | Active-Low Reset Output | Open-drain output; sinks ≥10 mA at 0.4 V; requires external pull-up for microprocessor reset line |
| RST | Active-High Reset Output | Push-pull output; drives high to VCC–0.3 V; directly interfaces with logic-level reset inputs |
| NC | No Connect | Unbonded die pad; must remain unconnected per design |
| NMI | Non-Maskable Interrupt Output | Open-drain output; asserts low ≥200 µs upon IN voltage decay; enables early shutdown sequencing |
Key Features
| Feature | Design Value |
|---|---|
| Dual-supply monitoring | Simultaneous VCC tracking and user-configurable IN-sense point enable layered power failure detection |
| Guaranteed reset timing | 130 ms minimum active reset duration ensures robust processor initialization regardless of supply slew rate |
| Noise-immune NMI | 5 µs minimum glitch rejection and 100 µV hysteresis prevent false interrupts from supply transients |
| Pushbutton debounce | Internal timing eliminates need for external RC networks or firmware debouncing logic |
| Pin compatibility | SOIC-8 footprint matches MAX707/MAX708; allows drop-in replacement in existing designs |
Applications
| Industrial PLC Controller | Medical Diagnostic Equipment |
|---|---|
|
Use Scenario: Power interruption during real-time data acquisition risks corrupted memory writes and unsafe state transitions. IC Role / Device Role / Timing Role: DS1707ESA/T&R monitors main 5V rail and backup supply sense point, asserting NMI for controlled save-and-halt, then RST after safe shutdown. Use Value: Prevents EEPROM corruption and ensures deterministic recovery via 130 ms reset hold and 200 µs NMI warning window. |
Use Scenario: Battery-backed systems require fail-safe response to brownout conditions before critical sensor readings are lost. IC Role / Device Role / Timing Role: DS1707ESA/T&R senses battery voltage via IN pin and triggers NMI to initiate emergency data flush, followed by hard reset. Use Value: 1.25 V reference and 100 µV hysteresis enable accurate low-voltage detection without external precision components. |
| Telecom Line Card | Automotive Infotainment Head Unit |
|
Use Scenario: Hot-swap insertion causes transient VCC droop; system must avoid spurious resets or lockups. IC Role / Device Role / Timing Role: DS1707ESA/T&R holds RST active for ≥130 ms post-insertion while VCC stabilizes, using fast VCC comparator response (tRPD ≤ 8 µs). Use Value: Eliminates need for discrete RC delay circuits and improves field reliability under dynamic power conditions. |
Use Scenario: Ignition cycling induces repeated 5V rail dips; microcontroller must reset cleanly without NMI-induced partial execution. IC Role / Device Role / Timing Role: DS1707ESA/T&R uses separate VCC and IN monitoring paths to distinguish between nominal dip (ignored) and true failure (NMI + RST). Use Value: Dual-threshold architecture prevents nuisance resets while ensuring deterministic recovery on actual fault events. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microprocessor supervisory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX707ESA+ | Same SOIC-8 package; identical pinout; VCCTP = 4.63 V (±2.5%), no IN sense input | Lacks external voltage monitoring (IN) and NMI output; suitable only for basic VCC-only supervision | Select when only VCC monitoring is needed and board space precludes adding external sense circuitry |
| TPS3808G33DBVR | 3.3V fixed threshold; 200 ms reset timeout; no NMI; SOT-23-6 package (6-pin) | Smaller footprint but no pushbutton input or dual-reset outputs; single-threshold only | Choose for cost-sensitive, space-constrained 3.3V systems where NMI and PBRST are not required |
Compared with MAX707ESA+ and TPS3808G33DBVR, DS1707ESA/T&R uniquely combines VCC supervision, user-defined IN sensing, NMI generation, and pushbutton debouncing in a single SOIC-8 package - enabling layered power-fail response without additional ICs or layout changes.
Availability
DS1707ESA/T&R is available at Aetrix Electronics and suitable for industrial control systems, medical instrumentation, telecom infrastructure, and automotive infotainment head units requiring stable component supply and long-term lifecycle support.
Supply support for DS1707ESA/T&R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) is a semiconductor company specializing in analog, mixed-signal, and power management ICs for industrial, communications, and computing applications.
The DS1707ESA/T&R belongs to Maxim's MicroMonitor™ family, designed specifically for robust, multi-function power supervision in mission-critical embedded systems where deterministic reset behavior and early fault warning are essential.
FAQ
What is the exact VCC trip point tolerance for DS1707ESA/T&R?
The DS1707ESA/T&R has a VCC trip point (VCCTP) of 4.50 V (min), 4.65 V (typ), and 4.75 V (max), corresponding to a nominal 5V ±5% reset threshold. This specification is guaranteed over the full -40°C to +85°C operating temperature range and applies specifically to the DS1707 variant - distinct from DS1708 variants with different trip points.
Does DS1707ESA/T&R support both active-high and active-low reset outputs simultaneously?
Yes, DS1707ESA/T&R provides two independent reset outputs: RST (active-low, open-drain) and RST (active-high, push-pull). This dual-output capability allows direct interface with microcontrollers requiring either polarity, eliminating level-shifting components. Both outputs are asserted synchronously for ≥130 ms during power-up or power-down events.
Can the IN pin of DS1707ESA/T&R monitor voltages higher than VCC?
No - the IN pin voltage must not exceed VCC, as stated in the Absolute Maximum Ratings. To monitor higher voltages (e.g., 12V), a resistor divider must scale the signal down so that the voltage at IN remains ≤ VCC while maintaining the 1.25 V trip point. The datasheet provides the formula VSENSE = (R2/(R1+R2)) × VCC to calculate appropriate resistor values.
Is DS1707ESA/T&R pin-compatible with MAX707ESA?
Yes, DS1707ESA/T&R is explicitly documented as pin-compatible with MAX707/MAX708 in 8-pin SOIC packages. Pin assignments (PBRST, VCC, GND, IN, RST, RST, NC, NMI) match exactly, and electrical characteristics including reset timing, trip points, and drive strength are functionally aligned - enabling direct substitution in legacy designs.
What is the minimum guaranteed reset pulse width for DS1707ESA/T&R?
The DS1707ESA/T&R guarantees a minimum reset pulse width of 130 ms for both RST and RST outputs during power-up and power-down events. This value is tested and specified across temperature and voltage ranges, and is independent of VCC slew rate - ensuring reliable microprocessor initialization even under slow-rising or noisy supply conditions.
DS1707ESA/T&R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- MicroMonitor™
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- Simple Reset/Power-On Reset
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 4.65V
- Output:
- Push-Pull, Push-Pull
- Reset:
- Active High/Active Low
- Reset Timeout:
- 130ms Minimum
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
DS1707ESA/T&R FAQ
1.How can I place an order for DS1707ESA/T&R through Aetrix?
Please submit a Request for Quotation (RFQ) for DS1707ESA/T&R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS1707ESA/T&R reliable?
The price and inventory of DS1707ESA/T&R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS1707ESA/T&R is usually 5 days.
3.What payment methods are accepted for DS1707ESA/T&R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS1707ESA/T&R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS1707ESA/T&R?
DS1707ESA/T&R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS1707ESA/T&R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS1707ESA/T&R?
For technical support, including DS1707ESA/T&R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS1707ESA/T&R requirements.
6.How does Aetrix verify that DS1707ESA/T&R is sourced from the original manufacturer or authorized distributors?
All DS1707ESA/T&R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS1707ESA/T&R meets industry standards.
7.What is the process for return or replacement of DS1707ESA/T&R?
All DS1707ESA/T&R units undergo pre-shipment inspection (PSI). If there is an issue with DS1707ESA/T&R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS1707ESA/T&R part is unused and in its original packaging.
Return procedure for DS1707ESA/T&R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DS1707ESA/T&R Tags
-
MIC826SYMT-TR
Microchip Technology
-
APX803S-31SA-7
Diodes Incorporated
-
APX803L20-29SA-7
Diodes Incorporated
-
TPS3828-33DBVR
Texas Instruments
-
V6340RSP3B+
EM Microelectronic
-
EM6325CXSP5B-2.9+
EM Microelectronic
-
MCP120T-300I/TT
Microchip Technology
-
MCP130T-315I/TT
Microchip Technology
-
MCP120T-475I/TT
Microchip Technology
-
MCP111T-300E/TT
Microchip Technology
-
MCP120T-315I/TT
Microchip Technology
-
MCP809T-315I/TT
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
