Analog Devices Inc./Maxim Integrated DS1708SEPA
- Part No.:
- DS1708SEPA
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Supervisors
- Package:
- 8-DIP (0.300", 7.62mm)
- Datasheet:
-
DS1708SEPA.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 8DIP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
DS1708SEPA from Maxim Integrated is a 3.3V ±10% precision voltage supervisor IC with dual active-high/active-low reset outputs, non-maskable interrupt (NMI), and pushbutton reset debouncing - designed for microprocessor power monitoring in industrial embedded systems. It provides 130ms minimum reset pulse width, 1.25V input trip point, and operates across -40°C to +85°C.
For engineers reviewing the DS1708SEPA datasheet, DS1708SEPA pinout, DS1708SEPA application, or DS1708SEPA equivalent, key selection considerations include VCC trip accuracy (2.85V–3.00V), NMI early-warning timing (200µs pulse, 5µs noise immunity), pushbutton debounce logic, and compatibility with 3.3V rail integrity validation in power-constrained edge devices.
Technical Context
The DS1708SEPA integrates three independent monitoring functions: VCC supply voltage detection (trip point 2.85V–3.00V), external voltage sense via high-impedance IN pin (1.25V threshold), and debounced PBRST input. All functions drive RST (active-low) and RST (active-high) outputs with synchronized 130–285ms assertion time.
Its internal bandgap reference enables temperature-compensated operation, while built-in hysteresis (100µV on IN) and 5µs qualification delay prevent false NMI triggers from supply noise. The device asserts NMI ≥200µs before RST/RST during power decay, enabling controlled system shutdown.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Trip Point | 2.85V (min) to 3.00V (max) - ensures reliable reset assertion for 3.3V ±10% systems |
| IN Trip Voltage | 1.20V–1.30V - sets precise external voltage sense threshold for upstream rail monitoring |
| Reset Pulse Width | 130ms (min) to 285ms (max) - guarantees sufficient processor stabilization after power recovery |
| NMI Pulse Width | ≥200µs - provides deterministic early warning before reset activation |
| Operating Temp | -40°C to +85°C - supports deployment in uncontrolled industrial environments |
| Supply Current | 50µA (typ) at VCC < 3.6V - enables low-power always-on supervision in battery-backed systems |
| Input Leakage | ±1.0µA - minimizes error in high-impedance resistor-divider sense networks |
Pinout & Package
DS1708SEPA is housed in an 8-pin plastic DIP (300-mil) package with through-hole mounting and industry-standard footprint.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PBRST | Pushbutton Reset Input | Active-low, internally pulled up (40kΩ); debounced to guarantee ≥130ms RST/RST pulse on release |
| VCC | Power Supply Input | Primary supply rail (1.2V–5.5V); powers internal reference, comparators, and output drivers |
| GND | Ground Reference | System ground return for all analog and digital circuitry; must be low-impedance |
| IN | External Voltage Sense Input | High-impedance (≤1µA leakage) comparator input referenced to 1.25V internal bandgap |
| RST | Active-Low Reset Output | Open-drain NMOS output; requires external pull-up; asserts low during fault or power-up |
| RST | Active-High Reset Output | Push-pull CMOS output; drives high during fault or power-up; no external components needed |
| NC | No Connect | Unbonded die pad; must remain floating; no electrical connection or routing required |
| NMI | Non-Maskable Interrupt Output | Open-drain NMOS output; pulses low ≥200µs when IN falls below trip point; enables preemptive shutdown |
Key Features
| Feature | Design Value |
|---|---|
| Dual Reset Outputs | RST (active-low, open-drain) and RST (active-high, push-pull) eliminate need for external level-shifting or inversion logic |
| Programmable Sense Threshold | IN pin accepts user-defined voltage divider to monitor any DC rail ≥1.25V, enabling flexible multi-rail supervision |
| Early Warning NMI | Guaranteed ≥200µs NMI pulse before RST/RST activation provides deterministic time margin for data save or state capture |
| Pushbutton Debounce Logic | Internal timing ensures ≥130ms reset pulse regardless of mechanical switch bounce or contact duration |
| Temperature-Compensated Reference | Bandgap-based 1.25V reference maintains ±1.5% accuracy over -40°C to +85°C, ensuring stable trip points |
Applications
| Industrial PLC Controller | Medical Diagnostic Handheld |
|---|---|
|
Use Scenario: Continuous operation in factory-floor PLCs where brownouts or transient surges risk firmware corruption. IC Role / Device Role / Timing Role: Primary VCC supervisor asserting RST/RST on 3.3V rail collapse and generating NMI for last-chance register dump. Use Value: 130ms guaranteed reset hold time prevents partial instruction execution; NMI timing allows 200µs pre-reset data preservation. |
Use Scenario: Battery-powered ultrasound probe requiring fail-safe boot sequencing and low-power sleep/wake supervision. IC Role / Device Role / Timing Role: Monitors 3.3V LDO output and main battery-derived 5V rail via IN pin; coordinates safe shutdown on voltage decay. Use Value: 50µA quiescent current extends battery life; 1.25V IN threshold enables accurate sensing of scaled-down battery voltages. |
| Telecom Remote Radio Unit | Smart Grid Edge Sensor Node |
|
Use Scenario: Outdoor RRUs exposed to wide ambient temperature swings and unstable PoE-derived supplies. IC Role / Device Role / Timing Role: Supervises 3.3V FPGA core rail and generates NMI to trigger FPGA configuration reload upon upstream 48V drop. Use Value: -40°C to +85°C rating ensures reliability; 100µV hysteresis on IN rejects switching noise from DC-DC converters. |
Use Scenario: Transformer-mounted sensors operating on harvested energy with highly variable input voltage. IC Role / Device Role / Timing Role: Uses IN pin to monitor rectified AC waveform; triggers RST on sustained under-voltage and NMI for graceful sensor data flush. Use Value: Adjustable trip via resistor divider accommodates varying harvest profiles; 2.85V–3.00V VCC window matches typical supercap discharge curve. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar voltage supervisor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX708ESA | 5V ±10% trip (4.25V–4.50V); no IN pin; identical pinout and RST/RST/NMI/PBRST functionality | Designed for 5V systems only; cannot monitor external rails or support 3.3V applications without level-shifting | Select when supervising legacy 5V microcontrollers and no external voltage sense is required |
| TPS3808G18DBVR | 3.3V ±1.5% trip (3.25V–3.35V); single active-low reset; no NMI or PBRST; SOT-23-6 package | Lacks early-warning interrupt and pushbutton interface; optimized for space-constrained, high-accuracy 3.3V-only use | Select when board area is critical and only basic reset assertion is needed without system-level coordination |
Compared with MAX708ESA and TPS3808G18DBVR, DS1708SEPA uniquely combines 3.3V ±10% supervision, external rail monitoring via IN, NMI-driven preemptive shutdown, and hardware-debounced pushbutton reset - making it the only option supporting coordinated power-fail response in resource-constrained industrial edge nodes.
Availability
DS1708SEPA is available at Aetrix Electronics and suitable for industrial automation controllers, medical handheld diagnostics, telecom remote radio units, and smart grid sensor nodes requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for DS1708SEPA includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog and mixed-signal ICs for industrial, automotive, and communications applications, emphasizing reliability, integration, and thermal robustness.
The DS1707/DS1708 family was engineered specifically for microprocessor power integrity assurance - delivering simultaneous VCC monitoring, external rail supervision, and coordinated reset/interrupt signaling in a single 8-pin package.
FAQ
What is the exact VCC trip voltage range for DS1708SEPA?
The DS1708SEPA has a guaranteed VCC trip point range of 2.85V (minimum) to 3.00V (maximum) at -40°C to +85°C, corresponding to 3.3V nominal supply with ±10% tolerance. This specification is validated per Maxim's DS1707/DS1708 datasheet Rev. 0, page 7, and applies exclusively to the DS1708SEPA variant - not to DS1708TEPA (±5%) or DS1708REPA (±20%). DS1708SEPA uses this window to ensure deterministic reset assertion before 3.3V rail collapse compromises microprocessor operation.
Does DS1708SEPA support monitoring a 5V rail using the IN pin?
Yes, DS1708SEPA supports monitoring a 5V rail via the IN pin using an external resistor divider, as confirmed in the "NON-MASKABLE INTERRUPT CIRCUIT EXAMPLE" (Figure 5, page 4) of the official datasheet. With IN's 1.25V trip threshold, a 5V rail maps to R1 = 26kΩ and R2 = 10kΩ. DS1708SEPA requires that the voltage at IN never exceed VCC; therefore, the monitored 5V rail must be scaled to ≤3.3V using the divider. This capability is intrinsic to DS1708SEPA and does not require additional components beyond the two resistors.
How does the NMI output of DS1708SEPA behave during power-up?
During power-up, DS1708SEPA disables NMI generation until VCC reaches its trip point (VCCTP = 2.85V–3.00V), preventing spurious interrupts from rising supply noise. Once VCCTP is crossed, NMI becomes active and will assert low only if the IN pin voltage falls below 1.20V–1.25V. DS1708SEPA enforces a 5µs qualification delay before NMI assertion, rejecting transients shorter than 2µs. This behavior is documented in the "OPERATION" section (page 2) and "AC ELECTRICAL CHARACTERISTICS" table (page 8) of the DS1708SEPA datasheet.
Is DS1708SEPA pin-compatible with MAX708 devices?
Yes, DS1708SEPA is pin-compatible with the MAX708 in 8-pin DIP, SOIC, and µSOP packages, as explicitly stated in the "FEATURES" section (page 1): "Pin compatible with the MAXIM MAX707/MAX708 in 8-pin DIP, 8-pin SOIC packages." Pin assignments for PBRST, VCC, GND, IN, RST, RST, NC, and NMI match exactly between DS1708SEPA and MAX708ESA/EPA. However, DS1708SEPA's 3.3V trip differs from MAX708's 5V trip, so functional replacement requires verification of supply voltage compatibility.
What is the maximum allowable voltage on the IN pin of DS1708SEPA?
The maximum allowable voltage on the IN pin of DS1708SEPA is limited to VCC, as stated in the "OPERATION" section (page 2): "Proper operation... requires that the voltage at the IN pin be limited to VCC." Exceeding VCC risks latch-up or damage. For example, with DS1708SEPA powered by 3.3V, IN must be ≤3.3V - achieved via resistor divider when monitoring higher rails like 5V or 12V. This constraint is absolute and applies across all temperatures and operating conditions specified for DS1708SEPA.
DS1708SEPA Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- MicroMonitor™
- Package/Case:
- 8-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- Simple Reset/Power-On Reset
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 2.93V
- Output:
- Push-Pull, Push-Pull
- Reset:
- Active High/Active Low
- Reset Timeout:
- 130ms Minimum
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 8-PDIP
DS1708SEPA FAQ
1.How can I place an order for DS1708SEPA through Aetrix?
Please submit a Request for Quotation (RFQ) for DS1708SEPA on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS1708SEPA reliable?
The price and inventory of DS1708SEPA are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS1708SEPA is usually 5 days.
3.What payment methods are accepted for DS1708SEPA?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS1708SEPA transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS1708SEPA?
DS1708SEPA orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS1708SEPA order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS1708SEPA?
For technical support, including DS1708SEPA datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS1708SEPA requirements.
6.How does Aetrix verify that DS1708SEPA is sourced from the original manufacturer or authorized distributors?
All DS1708SEPA products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS1708SEPA meets industry standards.
7.What is the process for return or replacement of DS1708SEPA?
All DS1708SEPA units undergo pre-shipment inspection (PSI). If there is an issue with DS1708SEPA, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS1708SEPA part is unused and in its original packaging.
Return procedure for DS1708SEPA:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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