Analog Devices Inc./Maxim Integrated DS1708SEUA/T&R

Overview

DS1708SEUA/T&R from Maxim Integrated is a 3.3V ±10% microprocessor supervisory circuit in 8-pin µSOP package, providing active-low and active-high reset outputs, non-maskable interrupt (NMI), and pushbutton reset debouncing. It monitors VCC supply voltage, external sense input (IN), and user pushbutton (PBRST) to ensure reliable power-up/power-down sequencing in embedded systems. Designed for industrial temperature range (−40°C to +85°C), it delivers 130 ms minimum reset pulse width and 200 µs NMI pulse on power-fail detection.

For engineers reviewing the DS1708SEUA/T&R datasheet, DS1708SEUA/T&R pinout, DS1708SEUA/T&R application, or DS1708SEUA/T&R equivalent, key selection criteria include its 3.3V ±10% VCC trip point (2.85V–3.00V), dual RST outputs, NMI early-warning capability, PBRST debounce timing, and compatibility with 3.0V–5.5V supply operation - critical for robust microcontroller reset management in space-constrained industrial designs.

Technical Context

The DS1708SEUA/T&R implements a precision bandgap-referenced comparator architecture to monitor VCC against a factory-trimmed threshold (VCCTP = 2.85V to 3.00V) and the IN pin against a fixed 1.25V reference. Its dual-reset outputs (RST and RST) are asserted simultaneously during undervoltage or power-up, held active ≥130 ms to guarantee processor stabilization.

It integrates a dedicated pushbutton reset input (PBRST) with internal 40 kΩ pull-up and hardware debouncing, generating guaranteed 130 ms reset pulses upon button release. The NMI output provides early warning of upstream supply decay via high-impedance IN sensing, with built-in 100 µV hysteresis and 5 µs noise immunity to prevent false triggers.

Key Specifications

Pinout & Package

DS1708SEUA/T&R is housed in an 8-pin µSOP (118-mil) package, measuring 3.0 mm × 3.0 mm × 1.0 mm, with exposed pad for thermal enhancement and RoHS-compliant lead-free finish.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar microprocessor supervisory applications.

Compared with MAX6326UT46D3+T and TPS3808G12QDBVRQ1, the DS1708SEUA/T&R uniquely delivers simultaneous active-low and active-high reset outputs, dedicated NMI for upstream power-fail warning, and hardware-debounced pushbutton support - all in a space-efficient µSOP without external passive components.

Availability

DS1708SEUA/T&R is available at Aetrix Electronics and suitable for industrial automation, medical device, smart metering, and edge gateway applications requiring stable component supply, long-term lifecycle assurance, and validated performance across −40°C to +85°C.

Supply support for DS1708SEUA/T&R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) is a semiconductor company specializing in high-performance analog, mixed-signal, and power management solutions for industrial, communications, and computing markets.

The DS1708SEUA/T&R belongs to the MicroMonitor™ family of supervisory ICs, engineered specifically for fail-safe microprocessor reset management in mission-critical embedded systems where power integrity and deterministic recovery are essential.

FAQ

What is the exact VCC trip point range for DS1708SEUA/T&R?

The DS1708SEUA/T&R has a factory-trimmed VCC trip point of 2.85V (min), 2.93V (typ), and 3.00V (max), corresponding to ±10% tolerance around a 3.3V nominal supply. This specification is verified across the full −40°C to +85°C operating temperature range and ensures reset assertion occurs before most 3.3V microcontrollers enter undefined operation. The DS1708SEUA/T&R datasheet specifies these values under DC Electrical Characteristics with Note 1.

Does DS1708SEUA/T&R support both active-low and active-high reset outputs simultaneously?

Yes, the DS1708SEUA/T&R provides two independent reset outputs: RST (active-low, open-drain) and RST (active-high, push-pull). Both assert concurrently during power-up, power-down, or pushbutton events. RST requires an external pull-up resistor for proper logic-level translation, while RST drives directly to VCC and can interface with standard CMOS reset inputs without additional components - a key differentiator of the DS1708SEUA/T&R design.

How does the NMI function work in DS1708SEUA/T&R, and what is its timing behavior?

The DS1708SEUA/T&R generates a non-maskable interrupt (NMI) when the voltage at the IN pin falls below 1.25V ±50 mV. Upon detection, NMI pulses low for ≥200 µs with 100 µV hysteresis and 5 µs noise immunity. This occurs before RST assertion, giving the host microcontroller time to execute critical save routines. The DS1708SEUA/T&R timing diagram Figure 6 confirms this sequence and delay relationship.

Can DS1708SEUA/T&R monitor voltages higher than VCC using the IN pin?

Yes, the DS1708SEUA/T&R IN pin supports monitoring of voltages higher than VCC via an external resistor divider. With a fixed 1.25V internal reference, the maximum allowable monitored voltage (VMAX) is calculated as VMAX = (VCC × 1.25V) / VSENSE. For example, with VCC = 3.3V and desired VSENSE = 4.5V, VMAX = 11.88V. The DS1708SEUA/T&R datasheet Figure 5 provides the full derivation and design equation.

Is DS1708SEUA/T&R pin-compatible with other members of the DS1707/DS1708 family?

Yes, the DS1708SEUA/T&R shares identical pinout and package dimensions with all 8-pin µSOP variants in the DS1707/DS1708 family, including DS1707EUA, DS1708EUA, DS1708REUA, and DS1708TEUA. This allows direct substitution within the same package footprint when adjusting reset threshold (e.g., switching from ±10% to ±5% or ±20%) without PCB redesign - a documented feature confirmed in the Pin Assignment section of the DS1708SEUA/T&R datasheet.