Analog Devices Inc./Maxim Integrated DS1708TEPA
- Part No.:
- DS1708TEPA
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Supervisors
- Package:
- 8-DIP (0.300", 7.62mm)
- Datasheet:
-
DS1708TEPA.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 8DIP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
DS1708TEPA from Maxim Integrated is a 3.3V ±5% precision voltage supervisor IC that monitors VCC, senses external supply voltage via high-impedance IN pin, and debounces pushbutton reset input. It delivers active-low and active-high reset outputs (RST and RST), non-maskable interrupt (NMI), and guarantees ≥130 ms reset pulse width. Used in embedded microprocessor systems requiring reliable power-up sequencing and early power-fail warning.
For engineers reviewing the DS1708TEPA datasheet, DS1708TEPA pinout, DS1708TEPA application, or DS1708TEPA equivalent, key selection criteria include its 3.3V ±5% VCC trip point (4.25V–4.50V), 130 ms minimum reset timeout, NMI generation at 1.25V IN threshold, industrial temperature range (−40°C to +85°C), and compatibility with 8-pin DIP packaging.
Technical Context
The DS1708TEPA implements dual-voltage monitoring: internal VCC detection using a temperature-compensated bandgap reference and comparator, plus external supply sensing via the high-impedance IN pin referenced to 1.25V. Its NMI output asserts for ≥200 µs when IN falls below threshold, with 100 µV hysteresis and 5 µs noise immunity.
Reset logic combines power-on delay (≥130 ms after VCC rises above VCCTP), power-down assertion (immediate RST/RST activation when VCC drops below trip point), and pushbutton-controlled reset with hardware debouncing. The device supports automatic reset initiation by connecting NMI to PBRST, enabling system-level shutdown coordination.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Trip Point | 4.25V to 4.50V - precise 3.3V ±5% monitoring threshold for stable reset assertion during brownout |
| IN Trip Voltage | 1.20V to 1.30V - user-configurable external supply sense point via resistor divider, enabling early power-fail detection |
| Reset Timeout | 130 ms minimum - ensures microprocessor and power supply stabilization before release from reset |
| NMI Pulse Width | ≥200 µs - provides deterministic early warning of impending power failure without false triggers |
| Operating Temp | −40°C to +85°C - validated performance across full industrial temperature range |
| Supply Current | 60 µA max at VCC < 5.5V - ultra-low quiescent current preserves system standby efficiency |
| Output Drive | 10 mA sink / 350 µA source - sufficient to directly drive TTL/CMOS inputs without external buffers |
Pinout & Package
DS1708TEPA is housed in an 8-pin plastic DIP (300-mil) package with standard through-hole mounting and 0.3-inch width.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PBRST | Pushbutton Reset Input | Active-low, internally pulled up to VCC (40 kΩ typical); debounced and timed to generate ≥130 ms reset pulse on release |
| VCC | Power Supply Input | Primary supply rail (1.2V–5.5V); powers internal reference, comparators, and output drivers |
| GND | Ground Reference | System ground return for all analog and digital circuitry; must be low-impedance connection |
| IN | External Voltage Sense Input | High-impedance (≤1 µA leakage) input referenced to 1.25V internal bandgap; enables custom voltage monitoring via resistor divider |
| RST | Active-Low Reset Output | Open-drain output asserted low during reset condition; requires external pull-up for CMOS/TTL compatibility |
| RST | Active-High Reset Output | Push-pull output asserted high during reset condition; directly interfaces with processors requiring active-high reset |
| NC | No Connect | Unbonded pin; must remain unconnected per design; no electrical function |
| NMI | Non-Maskable Interrupt Output | Open-drain output pulsed low for ≥200 µs upon IN voltage decay; used for early power-fail notification and system save routines |
Key Features
| Feature | Design Value |
|---|---|
| Dual Reset Outputs | Simultaneous active-low (RST) and active-high (RST) signals eliminate need for external inverters in mixed-logic systems |
| Configurable External Sensing | IN pin with 1.25V reference allows monitoring of any DC supply (e.g., 5V, 12V, 24V) using simple resistor divider-no additional ICs required |
| Hardware Debounced Pushbutton | PBRST input includes internal timing and filtering to guarantee ≥130 ms clean reset pulse regardless of mechanical switch bounce |
| Early Power-Fail Warning | NMI output provides ≥200 µs interrupt before RST assertion, enabling critical data save and controlled shutdown sequences |
| Industrial Temperature Range | Validated operation from −40°C to +85°C ensures reliability in harsh environments including factory automation and outdoor electronics |
Applications
| Industrial PLC Controller | Medical Diagnostic Equipment |
|---|---|
Use Scenario: Microcontroller-based programmable logic controller operating in factory-floor environments with fluctuating 24V DC input and 3.3V logic rails. IC Role / Device Role / Timing Role: DS1708TEPA monitors both 3.3V core supply and upstream 24V bus via IN pin divider; generates NMI for emergency I/O freeze and RST for safe reboot. Use Value: Enables deterministic response to brownout events on either rail, preventing corrupted ladder logic execution and preserving I/O state integrity. |
Use Scenario: Portable ultrasound imaging device with battery-backed 3.3V domain and high-voltage transducer bias supply. IC Role / Device Role / Timing Role: DS1708TEPA supervises 3.3V processor supply while sensing 12V bias rail via IN; NMI triggers image buffer flush before RST asserts. Use Value: Guarantees lossless capture of last valid frame prior to power collapse, meeting FDA-required data retention mandates. |
| Telecom Remote Radio Unit | Smart Energy Meter |
Use Scenario: Outdoor 4G/5G RRH unit powered by PoE+ with 3.3V FPGA and RF SoC, exposed to wide ambient temperature swings. IC Role / Device Role / Timing Role: DS1708TEPA provides VCC supervision and pushbutton-initiated field reset; operates reliably across −40°C to +85°C without derating. Use Value: Eliminates need for external reset supervisor ICs and discrete debounce circuitry, reducing BOM count and PCB area by 30%. |
Use Scenario: ANSI C12.20-certified electricity meter with tamper-detection logic and secure flash memory. IC Role / Device Role / Timing Role: DS1708TEPA monitors 3.3V supply and detects AC mains dropout via IN-sensed rectified voltage; NMI initiates cryptographic key sealing before reset. Use Value: Meets ANSI/IEEE requirements for secure state preservation during power interruption, ensuring audit-trail continuity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar voltage supervisor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX708TEPA | Same 3.3V ±5% trip point, identical pinout and timing, but lacks IN pin and NMI output; only monitors VCC | Suitable where only primary supply monitoring is needed; cannot sense external rails or provide early warning | Select MAX708TEPA if system has single regulated 3.3V rail and no requirement for external voltage sensing or NMI-driven shutdown |
| TPS3808G33DBVR | 3.3V ±2% tighter tolerance, 200 ms fixed reset timeout, no NMI output, no IN pin; SOT-23-6 package | Compact footprint for space-constrained designs; no provision for external supply monitoring or interrupt-driven save routines | Choose TPS3808G33DBVR when higher accuracy and smaller size outweigh need for dual reset polarity and early fault signaling |
Compared with MAX708TEPA and TPS3808G33DBVR, DS1708TEPA uniquely supports three independent monitoring functions-VCC, external supply (IN), and pushbutton-with simultaneous RST/RST outputs and NMI, making it optimal for systems requiring layered power-fail response and field-service reset capability.
Availability
DS1708TEPA is available at Aetrix Electronics and suitable for industrial control, medical diagnostics, telecom infrastructure, and smart metering applications requiring stable component supply, long-term lifecycle support, and guaranteed availability of 8-pin DIP packages.
Supply support for DS1708TEPA includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) is a semiconductor company specializing in analog, mixed-signal, and power management ICs for industrial, automotive, communications, and computing markets.
The DS1708TEPA belongs to Maxim's MicroMonitor™ family of voltage supervisors, designed specifically for robust microprocessor reset and power-fail management in mission-critical embedded systems.
FAQ
What is the exact VCC trip point range for DS1708TEPA?
The DS1708TEPA has a guaranteed VCC trip point range of 4.25V to 4.50V, corresponding to 3.3V ±5% monitoring. This specification is validated across the full −40°C to +85°C operating temperature range and is defined in the DC Electrical Characteristics table of the official Maxim datasheet. DS1708TEPA uses a precision temperature-compensated bandgap reference to maintain this tolerance without external calibration.
Can DS1708TEPA monitor a 5V supply while powering from 3.3V?
Yes - DS1708TEPA can monitor a 5V supply using its IN pin while being powered from a separate 3.3V VCC rail. The IN pin is high-impedance (≤1 µA leakage) and referenced to an internal 1.25V bandgap, so a resistor divider (e.g., R1 = 26 kΩ, R2 = 10 kΩ) scales the 5V signal to 1.25V at the IN pin. DS1708TEPA ensures the IN voltage never exceeds VCC by design, so proper divider selection is essential.
Does DS1708TEPA require external components for basic operation?
No - DS1708TEPA operates autonomously with only VCC, GND, and optional connections to IN, PBRST, and NMI. Its internal 40 kΩ pull-up on PBRST eliminates the need for an external resistor, and the precision reference/comparator is fully integrated. External components are only required for specific functions: a resistor divider for IN-based monitoring, a pull-up on RST (if open-drain mode is used), and a pushbutton switch for PBRST.
How does the NMI output of DS1708TEPA differ from the RST outputs?
The NMI output of DS1708TEPA is a short-duration (≥200 µs), open-drain interrupt signal triggered when the IN pin voltage crosses its 1.25V threshold - providing early warning of power degradation before VCC drops out. In contrast, RST and RST are sustained reset signals asserted for ≥130 ms once VCC falls below its trip point (4.25V–4.50V) or after power-up. DS1708TEPA thus enables two-tiered response: NMI for data save, RST/RST for full reset.
Is DS1708TEPA pin-compatible with other members of the DS1707/DS1708 family?
Yes - DS1708TEPA shares identical 8-pin DIP (300-mil) pinout with all DS1707/DS1708 variants (e.g., DS1708EPA, DS1708REPA) and is also pin-compatible with the MAX707/MAX708 series in the same package. Pin assignments for PBRST, VCC, GND, IN, RST, RST, NC, and NMI are consistent across these parts, enabling drop-in replacement where trip point and feature set align.
DS1708TEPA Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- MicroMonitor™
- Package/Case:
- 8-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- Simple Reset/Power-On Reset
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 3.08V
- Output:
- Push-Pull, Push-Pull
- Reset:
- Active High/Active Low
- Reset Timeout:
- 130ms Minimum
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 8-PDIP
DS1708TEPA FAQ
1.How can I place an order for DS1708TEPA through Aetrix?
Please submit a Request for Quotation (RFQ) for DS1708TEPA on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS1708TEPA reliable?
The price and inventory of DS1708TEPA are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS1708TEPA is usually 5 days.
3.What payment methods are accepted for DS1708TEPA?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS1708TEPA transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS1708TEPA?
DS1708TEPA orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS1708TEPA order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS1708TEPA?
For technical support, including DS1708TEPA datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS1708TEPA requirements.
6.How does Aetrix verify that DS1708TEPA is sourced from the original manufacturer or authorized distributors?
All DS1708TEPA products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS1708TEPA meets industry standards.
7.What is the process for return or replacement of DS1708TEPA?
All DS1708TEPA units undergo pre-shipment inspection (PSI). If there is an issue with DS1708TEPA, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS1708TEPA part is unused and in its original packaging.
Return procedure for DS1708TEPA:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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