Analog Devices Inc./Maxim Integrated DS1708TESA+T&R

Overview

DS1708TESA+T&R from Maxim Integrated is a 3.3V ±5% precision voltage supervisor IC with dual active-high/active-low reset outputs, non-maskable interrupt (NMI), and pushbutton reset debouncing. It monitors VCC and an external sense point (IN), delivers 130ms minimum reset pulse width, and operates across -40°C to +85°C for industrial microprocessor power management.

For engineers reviewing the DS1708TESA+T&R datasheet, DS1708TESA+T&R pinout, DS1708TESA+T&R application, or DS1708TESA+T&R equivalent, key selection criteria include its 3.3V ±5% VCC trip point (3.00–3.15V), dual RST outputs, NMI early-warning capability, 130ms reset timeout, and SOIC-8 industrial-grade packaging.

Technical Context

The DS1708TESA+T&R implements a dual-threshold monitoring architecture: one comparator tracks VCC directly (VCCTP = 3.00–3.15V), while a second monitors an external supply via high-impedance IN pin referenced to 1.25V internal bandgap. Its NMI output asserts for ≥200ns upon IN falling below trip point, with 100µV hysteresis and 5µs noise immunity.

Reset generation uses internal timing circuitry that holds RST and RST active for ≥130ms after VCC recovery or PBRST release. The device integrates 40kΩ internal pull-up on PBRST, supports direct NMI-to-PBRST feedback for automatic reset on power failure, and requires no external components for basic operation.

Key Specifications

Pinout & Package

DS1708TESA+T&R is supplied in an 8-pin SOIC (150-mil) package with gull-wing leads, JEDEC MS-012AC compliant, body size 4.9mm × 3.9mm × 1.75mm.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar voltage supervisor applications.

Compared with MAX6326UT43D3+T and TPS3808G33DBVR, DS1708TESA+T&R uniquely combines ±5% 3.3V supervision, dual RST outputs, NMI early warning, and hardware-debounced PBRST in a single SOIC-8 package-enabling robust, self-contained power management without external components or firmware intervention.

Availability

DS1708TESA+T&R is available at Aetrix Electronics and suitable for industrial automation, telecom infrastructure, medical imaging, and automotive infotainment systems requiring stable component supply, long-term lifecycle support, and guaranteed industrial temperature performance.

Supply support for DS1708TESA+T&R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power management ICs for demanding industrial, automotive, and communications applications.

The DS1708 series belongs to Maxim's MicroMonitor family of voltage supervisors, engineered specifically for fail-safe microprocessor power management in systems where deterministic reset behavior, early power-failure warning, and pushbutton reliability are critical.

FAQ

What is the exact VCC trip point range for DS1708TESA+T&R?

The DS1708TESA+T&R has a guaranteed VCC trip point range of 3.00V to 3.15V, corresponding to ±5% tolerance around a nominal 3.3V supply. This specification is validated across -40°C to +85°C and defines the voltage threshold at which the device asserts RST and RST outputs during power-down. The DS1708TESA+T&R datasheet specifies VCCTP = 3.00/3.08/3.15V (min/typ/max) under recommended operating conditions.

Does DS1708TESA+T&R support both active-high and active-low reset outputs simultaneously?

Yes, DS1708TESA+T&R provides two independent reset outputs: RST (active-high, CMOS) and RST (active-low, open-drain or CMOS). Both outputs are asserted concurrently during reset conditions-including power-up, power-down, and PBRST activation-and remain synchronized for ≥130ms. This dual-output architecture allows DS1708TESA+T&R to interface directly with microprocessors requiring either polarity without external inverters or level shifters.

How does the IN pin function in DS1708TESA+T&R, and what voltage can it monitor?

The IN pin in DS1708TESA+T&R is a high-impedance input referenced to an internal 1.25V bandgap comparator. It monitors external voltages via a resistor divider, with trip point determined by VSENSE = (R2/(R1+R2)) × VCC. DS1708TESA+T&R supports monitoring of supplies up to ~12V (e.g., 12V rail with R1=26kΩ, R2=10kΩ), provided the divided voltage at IN stays ≤VCC and within 1.20–1.30V. This enables upstream fault detection not possible with VCC-only supervision.

Can DS1708TESA+T&R generate a reset automatically when an external supply fails?

Yes, DS1708TESA+T&R supports automatic reset initiation on external supply failure by connecting the NMI output to the PBRST input. When the IN-monitored supply decays below its trip point, DS1708TESA+T&R pulses NMI low for ≥200ns; this edge triggers internal debouncing and forces RST/RST active for ≥130ms. This closed-loop configuration enables fully autonomous shutdown and recovery without host processor involvement, making DS1708TESA+T&R ideal for unattended systems.

What is the reset timeout duration for DS1708TESA+T&R, and is it adjustable?

The DS1708TESA+T&R provides a fixed reset timeout of 130ms minimum (130–285ms typical), guaranteed across temperature and voltage. This duration is internally generated and not user-adjustable via external components. It ensures sufficient time for power supply stabilization and microprocessor initialization after VCC recovery. Unlike watchdog-based supervisors, DS1708TESA+T&R's timeout is strictly tied to VCC and PBRST events-not programmable or configurable.