Analog Devices Inc./Maxim Integrated DS1814BR-5/T&R
- Part No.:
- DS1814BR-5/T&R
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Supervisors
- Package:
- SC-74A, SOT-753
- Datasheet:
-
DS1814BR-5/T&R.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL SOT23-5
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
DS1814BR-5/T&R from Maxim Integrated is a 5V microprocessor supervisory circuit with active-low reset output, 4.75V VCC trip point (±5%), 140ms minimum reset pulse width, and watchdog timer timeout of 1.12s. It monitors power supply integrity, detects software lockup via strobe input, and supports pushbutton reset override - deployed in embedded controllers requiring reliable power-on reset and fail-safe recovery.
For engineers reviewing the DS1814BR-5/T&R datasheet, DS1814BR-5/T&R pinout, DS1814BR-5/T&R application, or DS1814BR-5/T&R equivalent, key selection criteria include VCC trip accuracy (±5%), SOT-23-5 package compatibility, watchdog disable capability via floating ST, push-pull RST output valid down to 1.0V VCC, and industrial temperature operation (-40°C to +85°C).
Technical Context
The DS1814BR-5/T&R implements a precision bandgap-based voltage monitor with 10mV hysteresis, a 1.12s watchdog timer triggered by ST input transitions, and internal debouncing for PBRST. Its RST output is push-pull, enabling direct drive of microprocessor reset inputs without external pull-up.
It belongs to the DS1814 'B' variant family: pin 3 provides active-high RST (complementing pin 1's active-low RST), ST (pin 4) enables watchdog functionality, and PBRST is not present - distinguishing it from 'A' and 'C' variants. The device operates across 1.0V–5.5V VCC and draws only 10–15µA typical quiescent current.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Trip Point | 4.75V ±5% - ensures reset assertion before 5V system brownout compromises MCU operation |
| Reset Pulse Width | 140–280ms - guarantees sufficient hold time for full processor initialization and clock stabilization |
| Watchdog Timeout | 1.12s - requires microcontroller to toggle ST at least once per 1.12s to prevent unintended reset |
| RST Output Type | Push-pull - drives reset line actively high/low; no external pull-up needed; valid down to 1.0V VCC |
| Supply Current | 10–15µA - enables integration into always-on, low-power monitoring paths without significant load |
| Operating Temp | -40°C to +85°C - certified for industrial-grade embedded control environments |
| Input Hysteresis | 10mV - prevents chatter during slow VCC ramp-up/down near trip threshold |
Pinout & Package
SOT-23-5 surface-mount package: 2.9mm × 1.6mm footprint, 1.1mm height, gull-wing leads, JEDEC MO-178 compatible.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | RST | Active-low reset output - asserted low during power fault, watchdog timeout, or power-up |
| 2 | GND | Ground reference - must be connected directly to system ground plane for noise immunity |
| 3 | RST | Active-high reset output - complements pin 1; enables dual-signaling to mixed-logic systems |
| 4 | ST | Watchdog strobe input - transition required every ≤1.12s; floating disables watchdog |
| 5 | VCC | Power supply input - accepts 1.0V–5.5V; powers internal comparator, timer, and outputs |
Key Features
| Feature | Design Value |
|---|---|
| Dual-reset outputs (RST / RST) | Supports both active-low and active-high reset architectures without level-shifting components |
| Watchdog disable via floating ST | Enables field reconfiguration or debug mode without hardware modification |
| 1.0V VCC operation limit | Ensures deterministic reset assertion through full power-down sequence to 0V when pull-down resistor used |
| 10mV trip hysteresis | Prevents oscillatory reset during marginal VCC conditions caused by ripple or slow transients |
| 140ms minimum reset hold time | Meets ARM Cortex-M, PIC, and 8051 power-on timing requirements for stable oscillator startup |
Applications
| Industrial PLC Controller | Medical Infusion Pump |
|---|---|
Use Scenario: Power interruption during motor actuation or sensor sampling causes MCU hang. IC Role / Device Role / Timing Role: DS1814BR-5/T&R asserts RST/RST on VCC dip <4.75V and forces watchdog reset if ST stalls >1.12s. Use Value: Guarantees hard reset before corrupted RAM state propagates to actuator drivers. | Use Scenario: Firmware crash halts dose delivery logic while battery remains charged. IC Role / Device Role / Timing Role: DS1814BR-5/T&R monitors 5V rail derived from DC-DC converter and pulses RST on ST timeout. Use Value: Restarts therapy control loop within 1.4s - meeting IEC 62304 Class C fault response requirement. |
| Automotive Body Control Module | Smart Energy Meter |
Use Scenario: Load dump transient collapses 5V domain during alternator regulation fault. IC Role / Device Role / Timing Role: DS1814BR-5/T&R holds RST active for ≥140ms post-recovery to stabilize CAN controller clock. Use Value: Prevents CAN bus arbitration errors due to unsynchronized node reset timing. | Use Scenario: Voltage sag during grid switching disrupts metrology ADC sampling. IC Role / Device Role / Timing Role: DS1814BR-5/T&R triggers RST on VCC drop below 4.75V and maintains reset until stable 5V restored. Use Value: Eliminates corrupted kWh accumulation by blocking firmware execution during invalid supply. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microprocessor supervisory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX823SEUR+T | Same SOT-23-5 pinout; 4.63V trip (±2.5%); no watchdog timer; single RST output | Lacks ST-driven watchdog - suitable only where software supervision is handled externally | Select when watchdog function is unnecessary and tighter trip tolerance (±2.5%) is prioritized over dual reset outputs |
| TPS3808G15DBVR | 4.5V trip (±0.5%); adjustable delay; open-drain RST; requires external pull-up; no PBRST/ST pins | No integrated watchdog or pushbutton interface - demands additional logic for system-level supervision | Select when ultra-precise trip point and programmable reset delay are critical, and board space allows pull-up resistor |
Compared with MAX823SEUR+T and TPS3808G15DBVR, the DS1814BR-5/T&R uniquely delivers dual active RST outputs, factory-trimmed 4.75V ±5% trip, and integrated watchdog with disable-by-float - reducing BOM count and enabling autonomous recovery in space-constrained industrial nodes.
Availability
DS1814BR-5/T&R is available at Aetrix Electronics and suitable for industrial automation, medical device firmware recovery, and automotive body electronics requiring stable component supply, long-lifecycle support, and guaranteed traceable sourcing.
Supply support for DS1814BR-5/T&R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power management ICs for industrial, automotive, and communications systems.
The DS1814BR-5/T&R belongs to Maxim's MicroMonitor™ supervisory product line, engineered specifically for robust microprocessor reset and watchdog supervision in harsh, unattended embedded environments.
FAQ
What is the exact VCC trip voltage and tolerance for DS1814BR-5/T&R?
The DS1814BR-5/T&R has a nominal VCC trip point of 4.75V with ±5% tolerance, meaning it asserts reset when VCC falls below 4.50V (min) and releases reset when VCC rises above 4.75V + hysteresis (10mV). This specification is factory-trimmed and validated across -40°C to +85°C. The '5' in the part number explicitly denotes the 5% tolerance grade, confirmed in the DS1814/DS1819 datasheet revision 8, page 6.
Does DS1814BR-5/T&R support both active-low and active-high reset outputs?
Yes, DS1814BR-5/T&R provides two independent reset outputs: pin 1 (RST) is active-low, and pin 3 (RST) is active-high - both asserted simultaneously during power fault, watchdog timeout, or power-up. This dual-output architecture eliminates need for external inverters in systems requiring mixed reset polarity, and is intrinsic to the 'B' variant as defined in the DS1814 pin assignment table.
Can the watchdog timer in DS1814BR-5/T&R be disabled, and how?
Yes, the watchdog timer in DS1814BR-5/T&R is disabled by leaving the ST input (pin 4) floating or tri-stated - no external pull-up or pull-down is required. The datasheet explicitly states: "The watchdog can be disabled by floating (or tri-stating) the ST input." When ST is inactive, the watchdog function is fully inhibited and does not affect RST outputs.
What is the minimum VCC level at which DS1814BR-5/T&R guarantees valid RST output?
The DS1814BR-5/T&R guarantees valid RST output down to 1.0V VCC using its internal push-pull driver. Below 1.0V, a 100kΩ pull-down resistor from RST to GND extends valid reset assertion to 0V VCC - a design technique documented in Figure 9 of the DS1814/DS1819 datasheet for full power-down sequencing.
Is DS1814BR-5/T&R pin-compatible with MAX823-series devices?
Yes, DS1814BR-5/T&R is pin- and function-compatible with the MAX823/24/25 family in SOT-23-5 package, as stated in the "Features" section of the DS1814/DS1819 datasheet. Pin mapping (RST, GND, RST, ST, VCC) matches MAX823SEUR+T pinout, enabling drop-in replacement where watchdog and dual-RST features are acceptable or desired.
DS1814BR-5/T&R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- MicroMonitor™
- Package/Case:
- SC-74A, SOT-753
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- Simple Reset/Power-On Reset
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 4.625V
- Output:
- Push-Pull, Push-Pull
- Reset:
- Active High/Active Low
- Reset Timeout:
- 140ms Minimum
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-23-5
DS1814BR-5/T&R FAQ
1.How can I place an order for DS1814BR-5/T&R through Aetrix?
Please submit a Request for Quotation (RFQ) for DS1814BR-5/T&R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS1814BR-5/T&R reliable?
The price and inventory of DS1814BR-5/T&R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS1814BR-5/T&R is usually 5 days.
3.What payment methods are accepted for DS1814BR-5/T&R?
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4.How is shipping managed for DS1814BR-5/T&R?
DS1814BR-5/T&R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS1814BR-5/T&R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS1814BR-5/T&R?
For technical support, including DS1814BR-5/T&R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS1814BR-5/T&R requirements.
6.How does Aetrix verify that DS1814BR-5/T&R is sourced from the original manufacturer or authorized distributors?
All DS1814BR-5/T&R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS1814BR-5/T&R meets industry standards.
7.What is the process for return or replacement of DS1814BR-5/T&R?
All DS1814BR-5/T&R units undergo pre-shipment inspection (PSI). If there is an issue with DS1814BR-5/T&R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS1814BR-5/T&R part is unused and in its original packaging.
Return procedure for DS1814BR-5/T&R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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