Analog Devices Inc./Maxim Integrated DS1831B

Overview

DS1831B from Maxim Integrated is a multisupply voltage monitor and reset IC with dual power-supply supervision (5V and 3.3V), two user-configurable sense inputs (IN1/IN2), master pushbutton reset (MPBRST), and a dedicated pushbutton status output (PBST). It delivers open-drain RST5V/RST3.3V outputs, tolerance-selectable trip points (5%/10%/20%), programmable reset delays (10ms/100ms/1s), and operates from −40°C to +85°C. It is used in embedded systems requiring reliable power sequencing and manual reset event tracking.

For engineers reviewing the DS1831B datasheet, DS1831B pinout, DS1831B application, or DS1831B equivalent, this page provides verified functional identity, exact pin roles for DIP-16 package, tolerance and delay configuration logic, PBST behavior under master reset events, and validated alternative parts for multisupply monitoring with status feedback.

Technical Context

The DS1831B integrates two precision voltage comparators referenced to a 1.25V temperature-compensated bandgap, enabling independent monitoring of IN5V, IN3.3V, IN1, and IN2. Its internal power is drawn from the higher of IN5V or IN3.3V, requiring ≥1.0V on either for operation and ≥1.5V for accurate monitoring. TOL5V/TOL3.3V pins configure trip-point tolerances (5%/10%/15% for 5V; 5%/10%/20% for 3.3V), while TD5V/TD3.3V select reset delays (10ms/100ms/1s) via GND/float/VCC states.

Unlike the DS1831A (which adds watchdog strobe and WDS output), the DS1831B replaces the 3.3V pushbutton reset input (PBRST3.3V) with PBST - an open-drain status output that latches low after a master pushbutton reset and clears only upon subsequent non-master reset events. MPBRST forces all RST/NMI outputs active, and PBST remains asserted until cleared by another reset source (e.g., power fault or NMI-triggered PBRST).

Key Specifications

Pinout & Package

DS1831B is housed in a 16-pin plastic DIP (300mil width) with standard through-hole footprint. Pin spacing is 0.100" (2.54mm), row-to-row distance is 0.300", and body width is 0.300". The package supports wave soldering per IPC/JEDEC J-STD-020A.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar multisupply monitoring applications.

Compared with DS1831B, DS1831BS offers identical electrical behavior in a smaller SO package but forfeits through-hole compatibility, while MAX6822 reduces feature count significantly - omitting dual-supply supervision, auxiliary monitoring, and PBST latching - making it unsuitable for applications requiring those capabilities.

Availability

DS1831B is available at Aetrix Electronics and suitable for industrial PLC power management, telecom line card supervision, medical diagnostic equipment, automotive infotainment head units, and embedded computing platforms requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for DS1831B includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) is a semiconductor company specializing in high-performance analog, mixed-signal, and power management ICs for industrial, communications, and computing markets.

The DS1831B belongs to Maxim's Micromonitor® family of power-supervisory ICs, designed specifically for robust, multi-rail voltage monitoring and reset generation in mission-critical embedded systems where reliability and configurability are paramount.

FAQ

What is the function of the PBST pin on the DS1831B?

The PBST pin on the DS1831B is an open-drain pushbutton status output that latches low following activation of the master pushbutton reset (MPBRST). It remains low until cleared by any subsequent non-MPBRST reset event - such as a power-fault-induced RST5V assertion or NMI-triggered reset. This behavior allows firmware to unambiguously detect and log manual reset actions independently of power-related resets. The DS1831B PBST requires an external pull-up resistor (typically 10kΩ) to maintain a valid high state when inactive.

How does the DS1831B determine its internal supply voltage?

The DS1831B draws internal operating current from the higher of the two supply inputs: IN5V or IN3.3V. It requires at least 1.0V on either input to operate, and accurate voltage monitoring demands that at least one of these inputs be ≥1.5V. If both inputs fall below 1.5V but remain ≥1.0V, all outputs stay active (low), preserving system reset state. This architecture ensures continued functionality during partial brownouts and eliminates dependency on a dedicated VCC rail - a key advantage in multisupply systems. The DS1831B relies on this dual-input sourcing for all internal bias and comparator operation.

Can the DS1831B monitor voltages other than 5V and 3.3V?

Yes, the DS1831B can monitor two additional voltages via IN1 and IN2, each compared against a precision 1.25V ±0.10V internal reference. By using external resistor dividers, users can scale higher voltages (e.g., 12V, 24V) or negative rails down to the 1.25V threshold. For example, a 11.5V trip point is achieved with a 100kΩ/820kΩ divider on IN1. These inputs also provide NMI1/NMI2 open-drain outputs that pulse low for ≥20µs upon crossing the threshold, enabling hardware-triggered interrupt handling. This capability makes the DS1831B suitable for monitoring auxiliary supplies beyond its primary 5V/3.3V rails.

What are the reset delay options for RST5V and RST3.3V on the DS1831B?

The DS1831B provides three discrete reset delay options for both RST5V and RST3.3V, selected independently via the TD5V and TD3.3V pins: 10ms (TD pin tied to GND), 100ms (TD pin left floating), or 1000ms (TD pin tied to VCC). These delays define the minimum time the respective reset output remains active after its associated supply returns to tolerance. The delays are set at power-up and cannot be changed dynamically. This strapping-based configuration eliminates external timing components and supports flexible sequencing - for instance, holding RST5V active longer than RST3.3V to ensure core logic stabilizes before peripheral initialization in the DS1831B.

How does the DS1831B differ from the DS1831A?

The DS1831B replaces the 3.3V pushbutton reset input (PBRST3.3V) found on the DS1831A with the PBST (pushbutton status) output, while the DS1831A includes watchdog timer functionality (ST input and WDS output) absent in the DS1831B. Both share identical dual-supply monitoring, tolerance/time-delay configuration, and master pushbutton (MPBRST) capability. Therefore, the DS1831B is optimized for applications needing manual-reset event tracking, whereas the DS1831A targets systems requiring software watchdog supervision. Neither part is pin-compatible with the other due to differing pin assignments - notably, pin 5 is PBST on DS1831B but NMI2 on DS1831A.