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Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Supervisors

Analog Devices Inc./Maxim Integrated DS1831BS+

Name: DS1831BS+
Brand: Analog Devices Inc./Maxim Integrated
SKU: DS1831BS+
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: DS1831BS+

Manufacturer:: Analog Devices Inc./Maxim Integrated

Category:: Supervisors

Package:: 16-SOIC (0.154", 3.90mm Width)

Datasheet:: DS1831BS+.pdf

Description:: IC SUPERVISOR 4 CHANNEL 16SOIC

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Product details

Overview

DS1831BS+ from Maxim Integrated is a multisupply voltage monitor IC with dual power-on reset (5V and 3.3V), two user-configurable sense inputs (IN1/IN2), open-drain reset outputs (RST5V/RST3.3V), and pushbutton status output (PBST). It draws internal power from the higher of IN5V or IN3.3V, supports tolerance selection (5%/10%/20%), reset delay selection (10ms/100ms/1s), and operates from –40°C to +85°C in 16-pin SOIC (150mil) package. Used in embedded systems requiring reliable multi-rail power sequencing and fault logging.

For engineers reviewing the DS1831BS+ datasheet, DS1831BS+ pinout, DS1831BS+ application, or DS1831BS+ equivalent, this page delivers verified technical context, exact pin functions, real-world timing behavior, tolerance configuration logic, and validated alternative options for industrial control, telecom power management, and FPGA-based systems with dual-supply monitoring needs.

Technical Context

The DS1831BS+ integrates two precision voltage comparators referenced to a 1.25V temperature-compensated bandgap, enabling independent monitoring of 5V and 3.3V rails plus two additional user-defined voltages via IN1 and IN2. Tolerance (TOL5V/TOL3.3V) and reset delay (TD5V/TD3.3V) are set at power-up by connecting pins to VCC, GND, or leaving them floating - no runtime reconfiguration.

Unlike the DS1831A (which adds watchdog timer and WDS output), the DS1831BS+ replaces the master pushbutton (MPBRST) and one NMI with PBST - an open-drain output that latches the status of the most recent reset event triggered by the master pushbutton. PBST remains low until cleared by any non-master reset event (e.g., power fault or NMI), providing deterministic fault-source identification in field-deployed systems.

Key Specifications

Parameter	Value and Actual Design Meaning
Supply Inputs	IN5V (1.0–5.5V) and IN3.3V (1.0–5.5V); device powers itself from the higher rail - enables operation during asymmetric brownout.
Reset Trip Points	IN5V: 4.00–4.75V (configurable 5%/10%/20% tolerance); IN3.3V: 2.47–3.15V - supports both 3.3V and 3.0V systems.
Reset Delay Options	10ms / 100ms / 1000ms per rail (via TD5V/TD3.3V pin states) - ensures stable release after power stabilization or manual reset.
Sense Inputs	IN1 and IN2 monitor external voltages down to 1.15V using internal 1.25V reference - enables custom trip points via resistor dividers.
Output Type	All RST and PBST outputs are open-drain - allows wired-OR with other system reset sources and flexible pull-up voltage selection.
Operating Temp	–40°C to +85°C - qualified for industrial and extended-temperature embedded applications without derating.
Package	16-pin SOIC (150mil), RoHS-compliant - compatible with standard surface-mount assembly and IPC-7351B footprints.

Pinout & Package

DS1831BS+ is housed in a 16-pin SOIC (150mil) package with 1.27mm pitch, JEDEC MS-012AC compliant. Pin 1 is marked with a dot or bevel; thermal pad is not present. All pins are CMOS-compatible with ±1µA leakage.

Pin/Terminal	Circuit Role	Design Meaning
1 IN3.3V	3.3V supply input	Primary power source if ≥ IN5V; sets bias for PBRST3.3V pull-up and internal reference.
2 RST3.3V	Open-drain 3.3V reset output	Active-low; requires external pull-up; asserts when IN3.3V falls below configured trip point.
3 TOL3.3V	Tolerance select for IN3.3V	GND = 10%, VCC = 5%, float = 20% - configures hysteresis and trip threshold at power-up only.
4 TD3.3V	Time-delay select for RST3.3V	GND = 10ms, float = 100ms, VCC = 1000ms - defines minimum active duration after fault or manual reset.
5 PBST	Pushbutton status output	Open-drain; latched low after MPBRST-triggered reset; cleared only by non-MPBRST event (e.g., power fault).
6 NMI1	Non-maskable interrupt 1	Open-drain; pulses low for ≥20µs when IN1 < 1.25V - used for upstream voltage fault detection.
7 NMI2	Non-maskable interrupt 2	Open-drain; pulses low for ≥20µs when IN2 < 1.25V - provides second independent fault channel.
8 MPBRST	Master pushbutton reset input	Pulled up internally to higher of IN5V/IN3.3V; falling edge ≥20µs forces all RST/NMI outputs active.
9 IN5V	5V supply input	Primary power source if > IN3.3V; sets bias for PBRST5V pull-up and internal circuitry.
10 RST5V	Open-drain 5V reset output	Active-low; requires external pull-up; asserts when IN5V falls below configured trip point.
11 TOL5V	Tolerance select for IN5V	GND = 10%, VCC = 5%, float = 20% - sets trip window before reset assertion.
12 TD5V	Time-delay select for RST5V	GND = 10ms, float = 100ms, VCC = 1000ms - ensures reset holds long enough for CPU initialization.
13 PBRST5V	5V pushbutton reset input	Pulled up internally to IN5V; falling edge ≥20µs asserts only RST5V - enables rail-specific manual reset.
14 IN1	User-configurable sense input 1	Monitors external voltage; compared to 1.25V reference - used with resistor divider for custom trip points.
15 IN2	User-configurable sense input 2	Monitors second external voltage; same 1.25V reference - supports dual auxiliary rail monitoring.
16 GND	Ground reference	Analog and digital ground common pin; must be low-impedance connection to system ground plane.

Key Features

Feature	Design Value
Multi-rail monitoring	Simultaneously supervises 5V, 3.3V, and two auxiliary supplies (IN1/IN2) with independent trip and delay settings.
Self-powered architecture	Draws operating current from higher of IN5V or IN3.3V - eliminates need for separate VCC and enables operation during partial brownout.
Configurable reset timing	Three discrete delay options (10ms/100ms/1s) per rail via simple pin strapping - no external components or firmware required.
Latched pushbutton status	PBST output retains master-reset origin until overwritten by another fault - enables post-mortem diagnostics in unattended systems.
Robust noise immunity	2µs minimum pulse rejection on NMI inputs and 300µs slew-rate filtering on supply inputs - prevents false resets from EMI or transients.

Applications

Industrial PLC Controller	Telecom Line Card
Use Scenario: Monitors 5V backplane, 3.3V FPGA core, +12V analog supply, and –5V bias rail in a modular I/O controller. IC Role / Device Role / Timing Role: DS1831BS+ acts as centralized power supervisor, asserting RST5V/RST3.3V to hold CPU and FPGA in reset until all rails stabilize, while PBST logs whether reset was caused by operator intervention or undervoltage. Use Value: Eliminates need for four discrete supervisors; PBST enables remote diagnostics via GPIO read - reducing BOM count and field service time.	Use Scenario: Ensures clean startup and graceful shutdown of DSP, PHY, and memory subsystems across multiple voltage domains in a carrier-grade line card. IC Role / Device Role / Timing Role: DS1831BS+ sequences reset release (100ms delay on 3.3V, 1s on 5V) to meet ASIC power-up ordering requirements, while IN1 monitors +1.8V DDR termination voltage. Use Value: Prevents bus contention and latch-up during power ramp; configurable delays replace fixed-timing RC networks - improving design reuse across product variants.
FPGA-Based Test Equipment	Medical Imaging Subsystem
Use Scenario: Supervises 12V motor driver, 5V I/O, 3.3V FPGA bank, and 2.5V ADC reference in portable benchtop instrumentation. IC Role / Device Role / Timing Role: DS1831BS+ uses IN2 to monitor battery voltage decay; when <2.5V, NMI2 triggers controlled shutdown sequence via microcontroller interrupt. Use Value: Enables predictive power-loss response instead of hard reset - preserves measurement state and avoids data corruption.	Use Scenario: Guarantees safe power sequencing for X-ray detector ASICs, high-voltage bias generators, and low-noise analog front-ends in diagnostic imaging modules. IC Role / Device Role / Timing Role: DS1831BS+ holds RST5V active for 1s while HV supply ramps, then releases RST3.3V after 100ms - enforcing strict interlock timing between analog and digital domains. Use Value: Meets IEC 62304 safety requirement for deterministic power-up behavior; PBST confirms manual reset was not used during clinical operation.

Industrial PLC Controller

Telecom Line Card

Use Scenario: Monitors 5V backplane, 3.3V FPGA core, +12V analog supply, and –5V bias rail in a modular I/O controller.

IC Role / Device Role / Timing Role: DS1831BS+ acts as centralized power supervisor, asserting RST5V/RST3.3V to hold CPU and FPGA in reset until all rails stabilize, while PBST logs whether reset was caused by operator intervention or undervoltage.

Use Value: Eliminates need for four discrete supervisors; PBST enables remote diagnostics via GPIO read - reducing BOM count and field service time.

Use Scenario: Ensures clean startup and graceful shutdown of DSP, PHY, and memory subsystems across multiple voltage domains in a carrier-grade line card.

IC Role / Device Role / Timing Role: DS1831BS+ sequences reset release (100ms delay on 3.3V, 1s on 5V) to meet ASIC power-up ordering requirements, while IN1 monitors +1.8V DDR termination voltage.

Use Value: Prevents bus contention and latch-up during power ramp; configurable delays replace fixed-timing RC networks - improving design reuse across product variants.

FPGA-Based Test Equipment

Medical Imaging Subsystem

Use Scenario: Supervises 12V motor driver, 5V I/O, 3.3V FPGA bank, and 2.5V ADC reference in portable benchtop instrumentation.

IC Role / Device Role / Timing Role: DS1831BS+ uses IN2 to monitor battery voltage decay; when <2.5V, NMI2 triggers controlled shutdown sequence via microcontroller interrupt.

Use Value: Enables predictive power-loss response instead of hard reset - preserves measurement state and avoids data corruption.

Use Scenario: Guarantees safe power sequencing for X-ray detector ASICs, high-voltage bias generators, and low-noise analog front-ends in diagnostic imaging modules.

IC Role / Device Role / Timing Role: DS1831BS+ holds RST5V active for 1s while HV supply ramps, then releases RST3.3V after 100ms - enforcing strict interlock timing between analog and digital domains.

Use Value: Meets IEC 62304 safety requirement for deterministic power-up behavior; PBST confirms manual reset was not used during clinical operation.

Equivalent & Alternatives

The following parts are listed as comparable options for similar multisupply monitoring applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
DS1831B	DIP-300mil package; identical functionality and pinout except for through-hole mounting.	Preferred for prototyping, legacy board rework, or mixed-technology assemblies where SOIC placement is impractical.	Select DS1831B when manual soldering, socketing, or compatibility with older DIP-based test fixtures is required.
MAX6369KA+T	Single 3.3V/5V supervisor with watchdog, no auxiliary sense inputs or PBST; 8-pin SOT23 package.	Supports basic dual-rail monitoring but lacks IN1/IN2, NMI outputs, and latched status - insufficient for multi-fault diagnostics.	Choose MAX6369KA+T only for space-constrained designs where only primary rail supervision is needed and PBST/NMI are unnecessary.

Compared with DS1831BS+, DS1831B offers identical electrical behavior in a through-hole package for easier validation, while MAX6369KA+T reduces footprint and cost at the expense of diagnostic capability and auxiliary monitoring - making DS1831BS+ the only option supporting full fault-source attribution in production-critical systems.

Availability

DS1831BS+ is available at Aetrix Electronics and suitable for industrial automation, telecom infrastructure, and medical electronics requiring stable component supply, long-term lifecycle support, and guaranteed traceability.

Supply support for DS1831BS+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) designs precision analog and mixed-signal ICs for industrial, automotive, and communications markets, with emphasis on reliability and integration.

The DS1831 family targets systems needing coordinated multi-rail power supervision and deterministic fault logging - especially where manual reset origin must be distinguished from power faults in safety- or uptime-critical applications.

FAQ

What is the function of the PBST pin on the DS1831BS+?

The PBST (Pushbutton Status) pin on the DS1831BS+ is an open-drain output that latches low when the master pushbutton (MPBRST) initiates a reset. It remains low until cleared by any subsequent non-MPBRST reset event - such as a power fault or NMI trigger. This behavior enables unambiguous post-event diagnosis in deployed systems. The DS1831BS+ PBST pin does not appear on DS1831 or DS1831A variants, making it a key differentiator for field-serviceable equipment.

How does the DS1831BS+ determine its internal power source?

The DS1831BS+ draws all internal operating current from whichever supply - IN5V or IN3.3V - presents the higher voltage at any given time. This self-selecting architecture ensures continuous operation even during asymmetric brownout conditions where one rail collapses before the other. As long as either IN5V or IN3.3V exceeds 1.0V, the DS1831BS+ maintains valid outputs; accurate monitoring requires at least one rail to be ≥1.5V. This feature eliminates dependency on a dedicated VCC pin and simplifies power domain partitioning.

Can the DS1831BS+ monitor voltages other than 5V and 3.3V?

Yes, the DS1831BS+ includes two dedicated sense inputs - IN1 and IN2 - each compared against an internal 1.25V temperature-compensated reference. By using external resistor dividers, users can configure precise trip points for auxiliary rails such as 12V, 2.5V, or –5V. For example, a 11.5V trip point is achieved with R1 = 820kΩ and R2 = 100kΩ. The DS1831BS+ NMI1 and NMI2 outputs pulse low for ≥20µs upon crossing threshold, enabling interrupt-driven fault response without software polling.

What are the valid configurations for reset delay timing on the DS1831BS+?

The DS1831BS+ supports three discrete reset delay durations per monitored rail: 10ms (TDxV = GND), 100ms (TDxV = float), and 1000ms (TDxV = VCC), where x is 5 or 3.3. These delays apply to both power-on reset assertion and manual reset recovery. Timing is guaranteed over temperature: e.g., TD5V = GND yields tRST = 10–20ms (min–max). Unlike programmable supervisors, DS1831BS+ delay selection is static - set at power-up and unchanged until next cycle - ensuring predictable, zero-software timing behavior critical for safety-certified designs.

How does the DS1831BS+ differ from the DS1831A variant?

The DS1831BS+ replaces the DS1831A's watchdog timer (WDS), watchdog strobe (ST), and TDWD pin with PBST, NMI2, and MPBRST - shifting focus from software health monitoring to hardware-originated fault attribution. While DS1831A provides watchdog timeout pulses to detect firmware hangs, DS1831BS+ provides latched PBST output to distinguish operator-initiated resets from power faults. Both share identical 5V/3.3V monitoring, tolerance/delay configuration, and IN1/IN2 sense capability - but DS1831BS+ is the only variant offering deterministic reset-source identification in mission-critical hardware.

DS1831BS+ Specifications

Product attributes: Attribute value

Manufacturer:: Analog Devices Inc./Maxim Integrated

Series:: MicroMonitor™

Package/Case:: 16-SOIC (0.154", 3.90mm Width)

Packaging:: Tube

Product Status:: Active

Programmable:: Not Verified

Type:: Multi-Voltage Supervisor

Number of Voltages Monitored:: 4

Voltage - Threshold:: 3.3V, 5V, Adj, Adj

Output:: Open Drain or Open Collector

Reset:: Active Low

Reset Timeout:: 10ms; 100ms; 1,000ms Minimum

Operating Temperature:: -40°C ~ 85°C (TA)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 16-SOIC

DS1831BS+ FAQ

1.How can I place an order for DS1831BS+ through Aetrix?

Please submit a Request for Quotation (RFQ) for DS1831BS+ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for DS1831BS+ reliable?

The price and inventory of DS1831BS+ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS1831BS+ is usually 5 days.

3.What payment methods are accepted for DS1831BS+?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS1831BS+ transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for DS1831BS+?

DS1831BS+ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your DS1831BS+ order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for DS1831BS+?

For technical support, including DS1831BS+ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS1831BS+ requirements.

6.How does Aetrix verify that DS1831BS+ is sourced from the original manufacturer or authorized distributors?

All DS1831BS+ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS1831BS+ meets industry standards.

7.What is the process for return or replacement of DS1831BS+?

All DS1831BS+ units undergo pre-shipment inspection (PSI). If there is an issue with DS1831BS+, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The DS1831BS+ part is unused and in its original packaging.

Return procedure for DS1831BS+:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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