Analog Devices Inc./Maxim Integrated DS1831C+
- Part No.:
- DS1831C+
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Supervisors
- Package:
- 16-DIP (0.300", 7.62mm)
- Datasheet:
-
DS1831C+.pdf
- Description:
- IC SUPERVISOR 4 CHANNEL 16DIP
- Quantity:
- Payment:

- Shipping:

Inventory:4,324
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
DS1831C+ from Maxim Integrated is a dual-supply voltage monitor IC that supervises 2.5V and 3.3V power rails while providing two additional user-configurable voltage sense inputs (IN1, IN2), open-drain reset outputs (RST2.5V, RST3.3V), non-maskable interrupts (NMI1, NMI2), and master/manual pushbutton reset (MPBRST). It draws internal power from the higher of IN2.5V or IN3.3V, supports 5%/10%/15% tolerance selection per rail, and delivers configurable reset delays of 10ms/100ms/1s - used in embedded systems requiring robust multi-rail power sequencing and fault detection.
For engineers reviewing the DS1831C+ datasheet, DS1831C+ pinout, DS1831C+ application, or DS1831C+ equivalent, this page provides verified functional identity, validated pin roles, confirmed tolerance and delay configurations, real-world use cases for multi-supply monitoring, and two technically documented alternative parts with precise functional distinctions.
Technical Context
The DS1831C+ integrates two precision voltage comparators referenced to a 1.25V temperature-compensated bandgap, each monitoring IN2.5V and IN3.3V against user-selectable trip points via TOL2.5V/TOL3.3V pins. Its internal bias circuitry enables operation as long as either supply exceeds 1.0V, with accurate monitoring requiring ≥1.5V on at least one supply input.
Reset timing is controlled by TD2.5V and TD3.3V pins, selecting fixed delays (10ms/100ms/1s) for RST2.5V and RST3.3V outputs respectively. The MPBRST pin forces all resets and NMIs active low when pulled low for ≥20µs, with internal 100kΩ pull-up tied to the higher of IN2.5V or IN3.3V - enabling system-level manual override without external components.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Inputs | IN2.5V (1.0–5.5V) and IN3.3V (1.0–5.5V); device powers itself from the higher rail |
| Reset Trip Accuracy | IN2.5V: ±1.25% (TOL2.5V = IN2.5V), ±2.5% (TOL2.5V = GND), ±5.0% (TOL2.5V = float) |
| Reset Delay Options | Selectable via TD2.5V/TD3.3V: 10ms (GND), 100ms (float), or 1000ms (VCC) |
| Non-Maskable Interrupts | NMI1/NMI2 reference 1.25V ±0.10V; trigger on IN1/IN2 < 1.25V with 100µV hysteresis |
| Operating Temperature | -40°C to +85°C - qualified for industrial-grade embedded control and telecom equipment |
| Output Type | Open-drain RST2.5V/RST3.3V/NMI1/NMI2 outputs require external pull-ups (e.g., 10kΩ to VCC) |
| Input Leakage | ±1.0 µA max - ensures minimal loading on monitored supplies and sense dividers |
Pinout & Package
DS1831C+ is available in 16-pin 300mil DIP and 16-pin 150mil SO packages. Both share identical pin mapping and electrical behavior.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN2.5V | 2.5V supply input | Primary power source for internal circuitry if ≥ IN3.3V; must exceed 1.0V for basic operation |
| IN3.3V | 3.3V supply input | Alternate power source; device selects higher of IN2.5V/IN3.3V for internal bias |
| RST2.5V | 2.5V reset output | Open-drain active-low signal asserting during undervoltage or manual reset |
| RST3.3V | 3.3V reset output | Open-drain active-low signal independent of RST2.5V; supports asynchronous rail reset |
| TOL2.5V | 2.5V tolerance select | Configures trip point: IN2.5V (5%), GND (10%), or float (15%) - latched at power-up |
| TOL3.3V | 3.3V tolerance select | Configures trip point: IN3.3V (5%), GND (10%), or float (20%) - latched at power-up |
| TD2.5V | 2.5V reset delay select | Sets RST2.5V hold time: GND (10ms), float (100ms), VCC (1000ms) |
| TD3.3V | 3.3V reset delay select | Sets RST3.3V hold time: GND (10ms), float (100ms), VCC (1000ms) |
| PBRST2.5V | 2.5V pushbutton reset input | Pulls RST2.5V active low when driven <0.3×VINT; internal 100kΩ pull-up to IN2.5V |
| PBRST3.3V | 3.3V pushbutton reset input | Pulls RST3.3V active low when driven <0.3×VINT; internal 100kΩ pull-up to IN3.3V |
| MPBRST | Master pushbutton reset input | Forces RST2.5V, RST3.3V, NMI1, NMI2 active low; internal 100kΩ pull-up to higher supply |
| IN1 / IN2 | Additional voltage sense inputs | Monitor upstream rails or analog signals; trip at ~1.25V with 100µV hysteresis |
| NMI1 / NMI2 | Non-maskable interrupt outputs | Open-drain pulses low for ≥20µs when IN1/IN2 fall below 1.25V - used for fault signaling |
| GND | Ground reference | Common return for all supplies, inputs, and outputs; required for comparator reference stability |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent supply monitoring | Simultaneous supervision of 2.5V and 3.3V rails with separate reset outputs and tolerance/delay configuration |
| User-configurable trip tolerances | Three selectable accuracy levels per rail (5%/10%/20%) via simple pin strapping - no external resistors needed |
| Flexible reset timing control | Three discrete delay options (10ms/100ms/1s) per rail, set at power-up and immune to runtime changes |
| Integrated manual reset hierarchy | Per-rail pushbuttons (PBRST2.5V/PBRST3.3V) plus master override (MPBRST) - all with debounced internal pull-ups |
| Two auxiliary voltage monitors | IN1/IN2 sense inputs referenced to 1.25V ±0.10V enable monitoring of 5V, 12V, or other rails using external resistor dividers |
| Industrial temperature operation | Validated performance across -40°C to +85°C - suitable for base station power management and industrial PLCs |
Applications
| Telecom Power Sequencing | Industrial PLC Supervision |
|---|---|
|
Use Scenario: Multi-rail telecom shelf with 3.3V FPGA core, 2.5V I/O bank, and 12V analog front-end. IC Role / Device Role / Timing Role: DS1831C+ monitors IN3.3V and IN2.5V independently, asserts RST3.3V before RST2.5V using sequenced TD pins, and triggers NMI1 on 12V decay via IN1 divider. Use Value: Ensures FPGA config integrity by holding core reset until I/O rail stabilizes, while NMI1 alerts host controller of analog supply degradation before brownout. |
Use Scenario: Programmable logic controller with isolated 24V field power, 5V logic, and 3.3V microcontroller. IC Role / Device Role / Timing Role: DS1831C+ uses IN2.5V (from 3.3V LDO) and IN3.3V (direct) to supervise MCU rails; IN2 monitors 5V via divider; MPBRST connects to front-panel reset button. Use Value: Guarantees deterministic boot after power interruption and enables field-serviceable manual reset without firmware involvement. |
| Embedded Network Router | Medical Diagnostic Module |
|
Use Scenario: Dual-core network processor board with 1.2V CPU core, 2.5V DDR interface, and 3.3V PHY. IC Role / Device Role / Timing Role: DS1831C+ supervises 2.5V DDR and 3.3V PHY supplies; TOL3.3V = GND (10% tolerance) accommodates noisy PHY rail; TD2.5V = VCC enforces 1s DDR reset hold. Use Value: Prevents DDR initialization failure due to transient PHY noise while ensuring sufficient time for memory controller retraining. |
Use Scenario: Portable ultrasound module with battery-backed 3.3V logic, 2.5V ADC reference, and 5V transducer driver. IC Role / Device Role / Timing Role: DS1831C+ monitors IN3.3V and IN2.5V; PBRST3.3V linked to emergency stop button; IN1 senses battery voltage via divider to preempt shutdown. Use Value: Maintains safe imaging state during brownout by asserting RST3.3V before ADC reference fails, and logs last-event cause via NMI1 pulse. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multisupply monitoring applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX6369KA+T | Single 3.3V supervisor with watchdog, no 2.5V monitoring or dual NMI outputs | Lacks dual-supply capability and auxiliary sense inputs; suitable only for single-rail systems | Choose MAX6369KA+T only when supervising one supply and requiring integrated watchdog timeout |
| TPS3808G33DBVR | Fixed 3.3V reset threshold, no TOL/ TD configuration, no NMI outputs or manual reset inputs | No tolerance adjustment, no auxiliary monitoring, no pushbutton support - minimal feature set | Choose TPS3808G33DBVR for cost-sensitive, single-rail applications where configurability is unnecessary |
Compared with DS1831C+, MAX6369KA+T offers watchdog functionality but omits 2.5V monitoring and dual NMI capability, while TPS3808G33DBVR provides basic 3.3V reset only - neither supports the DS1831C+'s multi-rail sequencing, tolerance tuning, or field-serviceable reset architecture.
Availability
DS1831C+ is available at Aetrix Electronics and suitable for telecom infrastructure, industrial automation, medical diagnostics, and embedded networking applications requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for DS1831C+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog and mixed-signal ICs for power management, sensing, and interface applications in industrial, automotive, and communications markets.
The DS1831C+ belongs to Maxim's MicroMonitor™ family of intelligent power supervisors, engineered specifically for systems with multiple voltage domains requiring coordinated reset sequencing, fault logging, and field-serviceable reset control.
FAQ
What is the minimum supply voltage required for DS1831C+ to operate?
The DS1831C+ requires at least one of its primary supply inputs - IN2.5V or IN3.3V - to be above 1.0V to maintain basic output functionality. For accurate voltage monitoring, however, at least one supply must exceed 1.5V. Below 1.5V, all outputs remain in the active (low) state to ensure fail-safe behavior during deep brownout conditions.
How does DS1831C+ select its internal power source?
The DS1831C+ automatically draws internal operating current from the higher of the IN2.5V or IN3.3V inputs. This eliminates the need for an external VCC rail and ensures reliable operation even if one supply drops out, provided the remaining supply stays within 1.0V–5.5V. The internal bias circuitry dynamically tracks the dominant rail without user intervention.
Can DS1831C+ monitor voltages higher than 3.3V?
Yes - DS1831C+ can monitor higher voltages such as 5V, 12V, or 24V using the IN1 and IN2 sense inputs. These pins are referenced to the internal 1.25V bandgap, so external resistor dividers scale the target voltage down to 1.25V. For example, a 12V rail would use an R1:R2 ratio of ~8.6:1 to achieve the correct trip point, as confirmed in the DS1831C+ application diagrams.
What happens when both PBRST2.5V and MPBRST are asserted simultaneously on DS1831C+?
When both PBRST2.5V and MPBRST are pulled low, the DS1831C+ prioritizes the master pushbutton function: RST2.5V, RST3.3V, NMI1, and NMI2 all go active low regardless of individual pushbutton states. The MPBRST signal overrides per-rail reset inputs, ensuring synchronized system-wide reset - critical for recovery from catastrophic faults where partial resets could leave subsystems in inconsistent states.
Is DS1831C+ pin-compatible with DS1831D or DS1831E variants?
No - DS1831C+, DS1831D, and DS1831E share the same package and pin count but differ in pin functionality. For example, DS1831D replaces NMI2 and MPBRST with WDS and ST pins, while DS1831E substitutes PBRST3.3V with PBST. Swapping variants without PCB revision will result in incorrect or nonfunctional behavior; each variant requires dedicated layout and firmware integration.
DS1831C+ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- MicroMonitor™
- Package/Case:
- 16-DIP (0.300", 7.62mm)
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- Multi-Voltage Supervisor
- Number of Voltages Monitored:
- 4
- Voltage - Threshold:
- 2.5V, 3.3V, Adj, Adj
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- 10ms; 100ms; 1,000ms Minimum
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 16-PDIP
DS1831C+ FAQ
1.How can I place an order for DS1831C+ through Aetrix?
Please submit a Request for Quotation (RFQ) for DS1831C+ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS1831C+ reliable?
The price and inventory of DS1831C+ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS1831C+ is usually 5 days.
3.What payment methods are accepted for DS1831C+?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS1831C+ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS1831C+?
DS1831C+ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS1831C+ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS1831C+?
For technical support, including DS1831C+ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS1831C+ requirements.
6.How does Aetrix verify that DS1831C+ is sourced from the original manufacturer or authorized distributors?
All DS1831C+ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS1831C+ meets industry standards.
7.What is the process for return or replacement of DS1831C+?
All DS1831C+ units undergo pre-shipment inspection (PSI). If there is an issue with DS1831C+, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS1831C+ part is unused and in its original packaging.
Return procedure for DS1831C+:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DS1831C+ Tags

-
MIC826SYMT-TR
Microchip Technology

-
APX803S-31SA-7
Diodes Incorporated

-
APX803L20-29SA-7
Diodes Incorporated
-
TPS3828-33DBVR
Texas Instruments

-
V6340RSP3B+
EM Microelectronic

-
EM6325CXSP5B-2.9+
EM Microelectronic

-
MCP120T-300I/TT
Microchip Technology

-
MCP130T-315I/TT
Microchip Technology

-
MCP120T-475I/TT
Microchip Technology

-
MCP111T-300E/TT
Microchip Technology

-
MCP120T-315I/TT
Microchip Technology

-
MCP809T-315I/TT
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

