Analog Devices Inc./Maxim Integrated DS1831CS/T&R
- Part No.:
- DS1831CS/T&R
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Supervisors
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
DS1831CS/T&R.pdf
- Description:
- IC SUPERVISOR 4 CHANNEL 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:4,875
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
DS1831CS/T&R from Maxim Integrated is a 2.5V/3.3V multisupply micro-monitor IC with dual open-drain reset outputs, two user-configurable voltage sense inputs (IN1/IN2), pushbutton reset capability, and programmable reset time delays (10ms/100ms/1s). It draws internal power from the higher of IN2.5V or IN3.3V, operates from −40°C to +85°C, and supports systems requiring independent monitoring of multiple rails-such as industrial controllers with mixed-voltage FPGA and microprocessor domains.
For engineers reviewing the DS1831CS/T&R datasheet, DS1831CS/T&R pinout, DS1831CS/T&R application, or DS1831CS/T&R equivalent, this page delivers verified functional identity, confirmed 16-pin SOIC-150mil package mapping, validated pin roles including RST2.5V/RST3.3V open-drain outputs and TOL/TD configuration inputs, and real-world selection guidance against comparable multisupply supervisors.
Technical Context
The DS1831CS/T&R implements two independent precision voltage comparators referenced to a 1.25V temperature-compensated bandgap, each driving an open-drain reset output (RST2.5V, RST3.3V) with user-selectable trip tolerances (5%/10%/15% for 2.5V; 5%/10%/20% for 3.3V) via TOL2.5V/TOL3.3V pins. Reset assertion timing is configured per rail using TD2.5V/TD3.3V pins, supporting 10ms, 100ms, or 1s minimum active durations.
It features three manual reset inputs: PBRST2.5V and PBRST3.3V for rail-specific override, and MPBRST for simultaneous activation of all resets and NMI outputs. Internal 100kΩ pull-ups tie each pushbutton input to its associated supply rail, and all outputs require external pull-up resistors (typically 10kΩ) for valid logic levels.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Inputs | IN2.5V (1.0–5.5V) and IN3.3V (1.0–5.5V); device powers internally from higher rail |
| Reset Trip Accuracy | IN2.5V: ±3.1% (TOL=IN2.5V), ±5.0% (TOL=GND), ±7.5% (TOL=float); IN3.3V: ±2.6% to ±8.0% depending on TOL config |
| Reset Time Delay Options | 10ms (TD=GND), 100ms (TD=float), 1000ms (TD=VCC) - independently selectable per rail |
| Operating Temperature | −40°C to +85°C - qualified for industrial embedded environments |
| Output Type | Open-drain RST2.5V and RST3.3V - compatible with 3.3V/2.5V/1.8V logic families via external pull-up |
| Voltage Sense Inputs | IN1 and IN2 referenced to 1.25V internal bandgap - support custom trip points (e.g., 11.5V via resistor divider) |
| Non-Maskable Interrupts | NMI1/NMI2 open-drain outputs pulse low ≥10µs when sensed voltage drops below 1.25V; include 100µV hysteresis |
Pinout & Package
DS1831CS/T&R is supplied in a 16-pin SOIC package with 150mil body width and standard JEDEC MS-012AC footprint. Pin spacing is 0.050", lead finish is matte tin, and thermal resistance (θJA) is 160°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN2.5V | 2.5V supply input | Primary power source for internal circuitry if ≥ IN3.3V; must exceed 1.0V for operation |
| RST2.5V | 2.5V reset output | Open-drain active-low signal asserting reset to 2.5V domain; requires external pull-up |
| TOL2.5V | 2.5V tolerance select | Configures trip point accuracy: tied to IN2.5V = 5%, GND = 10%, float = 15% |
| TD2.5V | 2.5V reset delay select | Sets RST2.5V active duration: GND = 10ms, float = 100ms, VCC = 1000ms |
| PBRST2.5V | 2.5V pushbutton reset input | Manual override: pulling low ≥20µs forces RST2.5V active for selected delay period |
| IN3.3V | 3.3V supply input | Alternate internal power source if > IN2.5V; must exceed 1.0V for operation |
| RST3.3V | 3.3V reset output | Open-drain active-low signal asserting reset to 3.3V domain; requires external pull-up |
| TOL3.3V | 3.3V tolerance select | Configures trip point accuracy: tied to IN3.3V = 5%, GND = 10%, float = 20% |
| TD3.3V | 3.3V reset delay select | Sets RST3.3V active duration: GND = 10ms, float = 100ms, VCC = 1000ms |
| PBRST3.3V | 3.3V pushbutton reset input | Manual override: pulling low ≥20µs forces RST3.3V active for selected delay period |
| MPBRST | Master pushbutton reset input | Forces both RST2.5V and RST3.3V active simultaneously when pulled low ≥20µs |
| NMI1 | Non-maskable interrupt 1 | Open-drain output pulses low ≥10µs when IN1 < 1.25V; includes noise immunity |
| NMI2 | Non-maskable interrupt 2 | Open-drain output pulses low ≥10µs when IN2 < 1.25V; includes noise immunity |
| IN1 | Voltage sense input 1 | Monitors external rail via resistor divider; referenced to 1.25V internal reference |
| IN2 | Voltage sense input 2 | Monitors second external rail via resistor divider; referenced to same 1.25V reference |
| GND | Ground reference | Common return path for all analog and digital functions; must be low-impedance |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent supply monitoring | Simultaneous 2.5V and 3.3V rail supervision with separate reset outputs and configurable tolerances |
| User-programmable reset timing | Three discrete delay options (10ms/100ms/1s) per rail via simple TD pin strapping - no external components required |
| Flexible manual reset architecture | Three pushbutton inputs (PBRST2.5V, PBRST3.3V, MPBRST) enable rail-specific or system-wide reset initiation |
| Two additional voltage sense channels | IN1 and IN2 support monitoring of auxiliary supplies (e.g., 12V, 5V) using external resistor dividers to 1.25V reference |
| Robust noise-immune comparator design | 100µV hysteresis and 2µs minimum input low-time requirement prevent false NMI generation from supply transients |
Applications
| Industrial PLC Controller | FPGA-Based Test Equipment |
|---|---|
|
Use Scenario: A programmable logic controller uses separate 2.5V (FPGA core), 3.3V (I/O bank), and 12V (analog front-end) rails with strict power sequencing requirements. IC Role / Device Role / Timing Role: DS1831CS/T&R monitors all three rails: IN2.5V and IN3.3V directly, IN1 via 12V-to-1.25V divider; asserts RST2.5V before RST3.3V using staggered TD configurations. Use Value: Ensures deterministic power-up sequence and prevents FPGA configuration corruption by holding core reset until I/O banks stabilize. |
Use Scenario: Automated test equipment employs high-speed FPGAs with 1.8V core, 2.5V transceiver, and 3.3V interface rails, requiring fault detection during hot-swap events. IC Role / Device Role / Timing Role: DS1831CS/T&R supervises 2.5V and 3.3V supplies while routing NMI1 to FPGA interrupt controller to flag undervoltage on 3.3V interface rail. Use Value: Enables firmware-level diagnostics and graceful shutdown instead of uncontrolled lockup when 3.3V rail dips during peripheral insertion. |
| Medical Imaging Subsystem | Telecom Line Card |
|
Use Scenario: MRI subsystem board integrates DSP, ADC, and analog signal chain powered by tightly regulated 2.5V, 3.3V, and ±15V rails. IC Role / Device Role / Timing Role: DS1831CS/T&R monitors 2.5V (DSP core) and 3.3V (ADC interface) rails; NMI2 triggers diagnostic logging when ±15V-derived 3.3V rail sags. Use Value: Provides traceable fault records for regulatory compliance without adding microcontroller overhead. |
Use Scenario: Carrier-grade line card uses redundant 3.3V power feeds and single 2.5V rail for SERDES; requires failover coordination between power modules. IC Role / Device Role / Timing Role: DS1831CS/T&R monitors primary and backup 3.3V feeds via IN3.3V and IN1, asserting RST3.3V only when both fall out-of-tolerance. Use Value: Prevents spurious resets during brief primary feed interruption by requiring dual-rail failure confirmation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multisupply monitoring applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX6369ESA+ | Single 3.3V supervisor with watchdog and manual reset; no dual-supply monitoring or auxiliary sense inputs | Only suitable for single-rail systems; lacks IN1/IN2 and independent 2.5V/3.3V trip control | Select when only 3.3V rail supervision is needed and watchdog functionality is prioritized over multisupply coverage |
| TPS3808G33DBVR | Single 3.3V supervisor with adjustable reset threshold (0.4V–5.0V) and 200ms fixed delay; no 2.5V channel or NMI outputs | Cannot monitor 2.5V rail concurrently; no provision for external voltage sensing or non-maskable interrupts | Choose for cost-sensitive designs where only one supply requires supervision and precise threshold tuning is critical |
Compared with MAX6369ESA+ and TPS3808G33DBVR, DS1831CS/T&R uniquely supports concurrent 2.5V/3.3V rail monitoring with independent tolerance and delay configuration, plus two auxiliary voltage sense channels - making it the only option among the three capable of full-system power integrity validation in mixed-voltage embedded platforms.
Availability
DS1831CS/T&R is available at Aetrix Electronics and suitable for industrial automation, medical instrumentation, telecom infrastructure, and FPGA-based embedded systems requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for DS1831CS/T&R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog and mixed-signal ICs for industrial, automotive, communications, and computing applications.
The DS1831CS/T&R belongs to Maxim's MicroMonitor™ family of power-supply supervisors, engineered specifically for robust, multi-rail voltage monitoring in mission-critical embedded systems with stringent reliability and sequencing requirements.
FAQ
What is the function of the MPBRST pin on the DS1831CS/T&R?
The MPBRST pin on the DS1831CS/T&R is the master pushbutton reset input. When pulled low for at least 20µs, it forces both RST2.5V and RST3.3V outputs active simultaneously, regardless of individual rail status. This enables coordinated system-wide reset initiation. The pin is internally pulled up to the higher of IN2.5V or IN3.3V via a 100kΩ resistor, eliminating the need for an external pull-up in most implementations.
Can the DS1831CS/T&R monitor voltages other than 2.5V and 3.3V?
Yes, the DS1831CS/T&R can monitor additional voltages using its IN1 and IN2 pins, which connect to internal comparators referenced to a precise 1.25V bandgap. By applying a resistor divider to scale higher voltages (e.g., 12V or 5V) down to 1.25V, users configure custom trip points. For example, a 11.5V trip point is achieved with R1 = 820kΩ and R2 = 100kΩ, as documented in the DS1831CS/T&R application examples.
How does the DS1831CS/T&R determine which supply powers its internal circuitry?
The DS1831CS/T&R automatically selects its internal power source from the higher voltage level between IN2.5V and IN3.3V. If IN3.3V is 3.4V and IN2.5V is 2.4V, the device draws current from IN3.3V. At least one of these inputs must exceed 1.0V for basic operation, and accurate voltage monitoring requires at least one to be above 1.5V. This dual-input architecture ensures reliable operation even if one rail fails.
What are the valid reset time delay options for RST2.5V on the DS1831CS/T&R?
The DS1831CS/T&R supports three discrete reset time delay options for RST2.5V, selected by the logic state of the TD2.5V pin: 10ms (TD2.5V tied to GND), 100ms (TD2.5V left floating), or 1000ms (TD2.5V tied to VCC). These values represent minimum active durations; typical and maximum times are 16ms/20ms, 160ms/200ms, and 1600ms/2000ms respectively, as specified in the DS1831CS/T&R AC electrical characteristics table.
Does the DS1831CS/T&R include watchdog timer functionality?
No, the DS1831CS/T&R does not include watchdog timer functionality. That feature is exclusive to the DS1831D and DS1831DS variants. The DS1831CS/T&R is the base version of the family and provides dual-supply monitoring, pushbutton reset, NMI outputs, and programmable reset delays-but no ST input or WDS output. Engineers requiring watchdog capability must select DS1831DS/T&R instead.
DS1831CS/T&R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- MicroMonitor™
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- Multi-Voltage Supervisor
- Number of Voltages Monitored:
- 4
- Voltage - Threshold:
- 2.5V, 3.3V, Adj, Adj
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- 10ms; 100ms; 1,000ms Minimum
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
DS1831CS/T&R FAQ
1.How can I place an order for DS1831CS/T&R through Aetrix?
Please submit a Request for Quotation (RFQ) for DS1831CS/T&R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS1831CS/T&R reliable?
The price and inventory of DS1831CS/T&R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS1831CS/T&R is usually 5 days.
3.What payment methods are accepted for DS1831CS/T&R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS1831CS/T&R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS1831CS/T&R?
DS1831CS/T&R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS1831CS/T&R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS1831CS/T&R?
For technical support, including DS1831CS/T&R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS1831CS/T&R requirements.
6.How does Aetrix verify that DS1831CS/T&R is sourced from the original manufacturer or authorized distributors?
All DS1831CS/T&R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS1831CS/T&R meets industry standards.
7.What is the process for return or replacement of DS1831CS/T&R?
All DS1831CS/T&R units undergo pre-shipment inspection (PSI). If there is an issue with DS1831CS/T&R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS1831CS/T&R part is unused and in its original packaging.
Return procedure for DS1831CS/T&R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DS1831CS/T&R Tags

-
MIC826SYMT-TR
Microchip Technology

-
APX803S-31SA-7
Diodes Incorporated

-
APX803L20-29SA-7
Diodes Incorporated
-
TPS3828-33DBVR
Texas Instruments

-
V6340RSP3B+
EM Microelectronic

-
EM6325CXSP5B-2.9+
EM Microelectronic

-
MCP120T-300I/TT
Microchip Technology

-
MCP130T-315I/TT
Microchip Technology

-
MCP120T-475I/TT
Microchip Technology

-
MCP111T-300E/TT
Microchip Technology

-
MCP120T-315I/TT
Microchip Technology

-
MCP809T-315I/TT
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

