Analog Devices Inc./Maxim Integrated DS1834A+

Overview

DS1834A+ from Maxim Integrated (now Analog Devices) is a dual-voltage supervisor IC that monitors 5V and 3.3V power supplies with independent tolerance selection, pushbutton reset override, and NMOS open-drain reset outputs. It asserts active-low resets for ≥350 ms after power stabilization or pushbutton release, and draws internal current from the higher of the two supply inputs. Used in embedded systems requiring reliable dual-rail power sequencing and manual reset capability.

For engineers reviewing the DS1834A+ datasheet, DS1834A+ pinout, DS1834A+ application, or DS1834A+ equivalent, key considerations include its NMOS open-drain output structure requiring external pull-ups, selectable 5% / 10% (5V) and 10% / 20% (3.3V) trip tolerances via TOL pins, 350 ms reset timeout, -40°C to +85°C operation, and compatibility with mixed-supply microcontroller reset circuits.

Technical Context

The DS1834A+ implements two independent voltage monitoring channels using precision temperature-compensated references and comparators. Each channel's trip point is set by connecting its TOL pin to GND (tighter tolerance) or to its respective supply rail (wider tolerance), enabling configurable detection thresholds without external components.

Its pushbutton reset input (PBRST) features internal 40 kΩ pull-up and hardware debouncing; pulling PBRST low for ≥2 ms forces both RST outputs active for ~350 ms after release. The NMOS open-drain outputs require external pull-up resistors (e.g., 10 kΩ) to VCC_5V or VCC_3.3V, and cannot be wire-ANDed if pulled to different voltages.

Key Specifications

Pinout & Package

DS1834A+ is available in 8-pin DIP, 8-pin SOIC (150-mil), and 8-pin µ-SOP (118-mil) packages. All variants share identical pinout and function mapping.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-voltage supervisor applications.

Compared with MAX6326–MAX6328 and TPS3808G33, the DS1834A+ uniquely combines dual-rail monitoring, hardware-configurable trip points, integrated pushbutton reset, and NMOS outputs-enabling single-chip reset coordination for mixed-supply systems without external logic or configuration registers.

Availability

DS1834A+ is available at Aetrix Electronics and suitable for industrial PLC controllers, medical diagnostic devices, automotive infotainment head units, and network edge gateways requiring stable component supply and long-term design-in support.

Supply support for DS1834A+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices (via acquisition of Maxim Integrated) designs high-performance analog, mixed-signal, and power management ICs for precision sensing, power integrity, and reliable system supervision.

The DS1834A+ belongs to Maxim's EconoReset™ family of voltage supervisors, engineered specifically for cost-sensitive, dual-rail embedded systems needing configurable fault detection and manual reset without software dependency.

FAQ

What is the output configuration of the DS1834A+ and how does it affect circuit design?

The DS1834A+ features NMOS open-drain reset outputs for both 5V RST and 3.3V RST pins. This requires external pull-up resistors-typically 10 kΩ-to the respective supply rails. Unlike push-pull outputs, open-drain allows wired-OR reset busing but prohibits connecting outputs pulled to different voltages. The DS1834A+ datasheet specifies this architecture explicitly, distinguishing it from the DS1834 (push-pull) and DS1834D (active-high push-pull). Designers must verify pull-up placement and voltage levels to ensure valid logic states across operating conditions.

How do the TOL pins configure trip voltage tolerances on the DS1834A+?

The DS1834A+ uses two dedicated TOL pins-5V TOL and 3.3V TOL-to select trip point accuracy without external components. Connecting 5V TOL to GND sets 5V trip tolerance to ±5% (4.50–4.75 V); tying it to 5VIN selects ±10% (4.25–4.49 V). Similarly, 3.3V TOL to GND gives ±10% (2.80–2.97 V), while connection to 3.3VIN enables ±20% (2.47–2.64 V). These configurations are hardwired at PCB layout stage and provide deterministic, repeatable supervision behavior across temperature and supply variation-critical for DS1834A+ deployment in industrial environments.

What is the minimum pulse width required on PBRST to trigger a reset on the DS1834A+?

The DS1834A+ requires a minimum low pulse width of 2 ms on the PBRST pin to initiate a synchronized reset of both 5V RST and 3.3V RST outputs. This timing is guaranteed across the full -40°C to +85°C operating range and is enforced by internal debouncing circuitry. Once the button is released, both RST outputs remain asserted for 200–500 ms (typical 350 ms), independent of the duration of the PBRST low pulse-as long as the minimum 2 ms threshold is met. This ensures robust manual reset activation even with mechanical switch bounce.

Can the DS1834A+ operate if only one supply rail is present?

Yes, the DS1834A+ remains fully functional with only one supply rail active. Its internal circuitry draws operating current from the higher of 5VIN or 3.3VIN, and valid reset outputs are maintained as long as at least one input remains ≥1.2 V. If only 5VIN is present, the 5V RST output operates normally while 3.3V RST remains inactive (high-impedance, pulled high externally). Likewise, with only 3.3VIN present, 3.3V RST functions and 5V RST is inactive. This behavior is documented in the DS1834A+ datasheet under "Output Valid Conditions" and supports partial-power fallback modes in redundant systems.

What is the recommended pull-up resistor value for DS1834A+ reset outputs?

A 10 kΩ pull-up resistor is the standard recommendation for DS1834A+ NMOS open-drain reset outputs, connected between each RST pin and its corresponding supply rail (5V RST → 5VIN, 3.3V RST → 3.3VIN). This value ensures sufficient rise time while limiting current draw during reset assertion (IOL = 10 mA max). Values between 4.7 kΩ and 100 kΩ are acceptable depending on bus capacitance and noise immunity requirements, but 10 kΩ balances speed, power, and noise rejection. The DS1834A+ datasheet confirms this in Figure 6 ("DS1834A NMOS OUTPUTS") and notes that resistor value is not critical in most implementations.