Analog Devices Inc./Maxim Integrated DS1834AU+T&R
- Part No.:
- DS1834AU+T&R
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Supervisors
- Package:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
DS1834AU+T&R.pdf
- Description:
- IC SUPERVISOR 2 CHANNEL 8UMAX
- Quantity:
- Payment:

- Shipping:

Inventory:4,590
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
DS1834AU+T&R from Maxim Integrated (now Analog Devices) is a dual-voltage power-on reset supervisor IC monitoring both 5V and 3.3V supplies with independent tolerance selection, pushbutton reset input, and CMOS push-pull outputs. It asserts active-low reset signals for each supply during out-of-tolerance conditions or manual override, maintaining reset for 350 ms after recovery - used in embedded systems requiring reliable dual-rail power sequencing and brownout protection.
For engineers reviewing the DS1834AU+T&R datasheet, DS1834AU+T&R pinout, DS1834AU+T&R application, or DS1834AU+T&R equivalent, key selection criteria include dual-supply trip point configurability (5%–10% for 5VIN, 10%–20% for 3.3VIN), internal 40 kΩ pull-up on PBRST, guaranteed 350 ms reset timeout, operating range of –40°C to +85°C, and SOIC-8 package compatibility with industrial control and telecom power management designs.
Technical Context
The DS1834AU+T&R integrates two independent voltage monitors with selectable trip thresholds via dedicated TOL pins: tying 5V TOL to GND sets 5VIN trip at 4.50–4.75 V (5% tolerance), while tying to 5VIN selects 4.25–4.49 V (10%). Similarly, 3.3V TOL selects 2.80–2.97 V (10%) or 2.47–2.64 V (20%). Internal precision temperature-compensated reference ensures stable threshold accuracy across –40°C to +85°C.
It features an internally debounced pushbutton reset input (PBRST) with 2 ms minimum low pulse detection, forcing both RST outputs active for ~350 ms after release. Power is drawn from the higher of 5VIN or 3.3VIN, and each RST output is sourced/sunk only from its respective supply rail - enabling true dual-rail independence without cross-coupling.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| 5VIN Trip Range (TOL=GND) | 4.50–4.75 V: sets 5% tolerance window for 5V rail monitoring |
| 3.3VIN Trip Range (TOL=3.3VIN) | 2.47–2.64 V: enables 20% tolerance for noisy or marginally regulated 3.3V supplies |
| Reset Timeout | 200–500 ms: guarantees minimum 350 ms active reset duration after supply recovery or PBRST release |
| PBRST Input Threshold | VIL ≤ 0.5 V, VIH ≥ 2 V: compatible with standard logic-level pushbutton interfaces |
| Operating Current | 35–50 µA: ultra-low quiescent draw supports battery-backed or energy-sensitive systems |
| Supply Range per Input | 1.2–5.5 V: allows operation even during deep brownout or partial power-up sequences |
| Output Type | CMOS push-pull: eliminates need for external pull-ups on RST outputs (unlike DS1834A) |
Pinout & Package
DS1834AU+T&R is supplied in an 8-pin SOIC (150-mil) package with surface-mount footprint and standard JEDEC MS-012AC dimensions (4.9 mm × 3.9 mm × 1.75 mm).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (5VIN) | 5V Supply Input | Main 5V rail connection; powers internal circuitry when higher than 3.3VIN |
| 2 (5V RST) | 5V Reset Output | Active-low CMOS push-pull output asserting reset when 5VIN is out-of-tolerance |
| 3 (5V TOL) | 5V Tolerance Select | Logic level determines 5VIN trip point: GND = 5%, 5VIN = 10% |
| 4 (GND) | Ground Reference | Common return path for all analog and digital functions |
| 5 (3.3VIN) | 3.3V Supply Input | Main 3.3V rail connection; powers internal circuitry if > 5VIN |
| 6 (3.3V RST) | 3.3V Reset Output | Active-low CMOS push-pull output asserting reset when 3.3VIN is out-of-tolerance |
| 7 (3.3V TOL) | 3.3V Tolerance Select | Logic level determines 3.3VIN trip point: GND = 10%, 3.3VIN = 20% |
| 8 (PBRST) | Pushbutton Reset Input | Internally pulled up to higher VIN (≈40 kΩ); low pulse ≥2 ms triggers dual reset |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent voltage monitoring | Simultaneous supervision of 5V and 3.3V rails with separate trip points and reset outputs - avoids single-point failure in mixed-supply systems |
| Selectable tolerance per rail | Configurable 5%/10% for 5VIN and 10%/20% for 3.3VIN via TOL pin strapping - adapts to varying supply stability requirements |
| Debounced pushbutton interface | Internal 2 ms debounce and 40 kΩ pull-up eliminate external RC network - reduces BOM count and PCB area |
| Guaranteed 350 ms reset hold time | Ensures processor and peripherals fully initialize before release - meets ARM, x86, and FPGA boot timing requirements |
| Single-supply operation from either rail | Draws bias current from higher of 5VIN or 3.3VIN - simplifies power domain management in dual-rail designs |
Applications
| Industrial PLC Controller | Telecom Line Card |
|---|---|
Use Scenario: Dual-rail power system with 5V microcontroller core and 3.3V FPGA I/O bank, subject to transient dips during hot-swap events. IC Role / Device Role / Timing Role: Supervises both rails independently; asserts 5V RST and 3.3V RST only when their respective supplies fall outside configured tolerance windows. Use Value: Prevents partial initialization by holding resets until both supplies stabilize - eliminates corrupted configuration writes during brownout recovery. | Use Scenario: Modular line card with redundant 5V and 3.3V DC/DC converters feeding DSP, PHY, and memory subsystems. IC Role / Device Role / Timing Role: Monitors converter outputs and provides synchronized reset assertion across multiple voltage domains upon any rail fault. Use Value: Enables clean system-wide restart without software intervention - critical for carrier-grade uptime compliance (e.g., GR-1089). |
| Medical Diagnostic Module | Automotive Infotainment Head Unit |
Use Scenario: Battery-backed diagnostic imaging module requiring fail-safe startup under variable input voltage (e.g., 12V automotive supply with LDO regulation). IC Role / Device Role / Timing Role: Detects 5VIN and 3.3VIN undervoltage during cold-cranking; maintains reset until both rails exceed trip thresholds and hold for 350 ms. Use Value: Guarantees deterministic boot sequence despite wide input transients - satisfies IEC 62304 safety-critical startup requirements. | Use Scenario: Infotainment head unit powered from vehicle battery (5V) and isolated 3.3V domain for audio codec and display interface. IC Role / Device Role / Timing Role: Provides hardware-based reset coordination between main SoC and peripheral ICs during ignition-on power ramp-up. Use Value: Eliminates race conditions between power rails and clock distribution - prevents lockup during cold start or accessory-mode transitions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-supply reset supervisor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX6326UT46D3+ | Single 4.63V reset threshold; no 3.3V monitoring or TOL select; SOT23-3 package | Only supervises one rail; lacks pushbutton input and dual-output capability | Use only when monitoring a single 5V supply with fixed 4.63V threshold and space-constrained layout |
| TPS3808G33DBVR | Single 3.3V supervisor; adjustable delay (1–10 s); no 5V channel or TOL pin | Designed for low-IQ single-rail applications; no dual-rail coordination or manual reset | Select when precise long-delay reset is needed for 3.3V-only systems with minimal quiescent current (<1 µA) |
Compared with MAX6326UT46D3+ and TPS3808G33DBVR, DS1834AU+T&R uniquely delivers simultaneous 5V/3.3V supervision with configurable tolerances, integrated pushbutton support, and guaranteed 350 ms reset hold - making it irreplaceable in mixed-voltage embedded systems requiring coordinated power-up sequencing and field-serviceable reset capability.
Availability
DS1834AU+T&R is available at Aetrix Electronics and suitable for industrial PLC controllers, telecom line cards, medical diagnostic modules, and automotive infotainment head units requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for DS1834AU+T&R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices (via acquisition of Maxim Integrated) designs high-performance analog, mixed-signal, and power management ICs for precision sensing, power integrity, and reliability-critical systems.
The DS1834AU+T&R belongs to Maxim's EconoReset™ family of cost-optimized power supervisors engineered for robust dual-rail monitoring in industrial, telecom, and medical equipment where predictable reset behavior under voltage transients is mandatory.
FAQ
What is the function of the 5V TOL and 3.3V TOL pins on the DS1834AU+T&R?
The 5V TOL and 3.3V TOL pins on the DS1834AU+T&R configure the voltage trip thresholds for their respective supply inputs. Tying 5V TOL to GND selects a 5% tolerance (4.50–4.75 V trip), while connecting it to 5VIN selects 10% (4.25–4.49 V). Similarly, 3.3V TOL set to GND yields 10% (2.80–2.97 V), and to 3.3VIN yields 20% (2.47–2.64 V). This configurability allows the DS1834AU+T&R to adapt to varying supply stability requirements across different system designs.
Does the DS1834AU+T&R require external pull-up resistors on its RST outputs?
No, the DS1834AU+T&R does not require external pull-up resistors on its RST outputs. Unlike the DS1834A variant, the DS1834AU+T&R features CMOS push-pull outputs capable of actively driving both high and low states. This eliminates the need for external pull-ups, reducing component count and simplifying design - a key advantage confirmed in the device's datasheet and functional description.
How long does the DS1834AU+T&R maintain reset after power returns to tolerance?
The DS1834AU+T&R maintains reset for 200–500 ms after the monitored supply returns to tolerance, with a typical value of 350 ms. This guaranteed timeout ensures sufficient time for system clocks, PLLs, and memory subsystems to stabilize before releasing the processor reset - meeting critical boot timing requirements across ARM, x86, and FPGA platforms. The DS1834AU+T&R implements this via internal timing circuitry independent of external components.
Can the DS1834AU+T&R operate if only one supply (e.g., 3.3VIN) is present?
Yes, the DS1834AU+T&R can operate with only one supply present. Its internal circuitry draws power from the higher of 5VIN or 3.3VIN, and valid RST outputs are maintained as long as at least one input remains above 1.2 V. If both supplies drop below 1.2 V, a resistor from RST to GND (≈100 kΩ) can preserve output state down to 0 V - a design option explicitly supported in the DS1834AU+T&R datasheet for zero-volt fail-safe operation.
What is the purpose of the PBRST pin on the DS1834AU+T&R?
The PBRST pin on the DS1834AU+T&R provides a debounced, logic-compatible interface for manual system reset. Internally pulled up to the higher VIN rail (~40 kΩ), it detects a low pulse ≥2 ms and responds by asserting both 5V RST and 3.3V RST for ~350 ms after release. This enables field-serviceable reset without requiring external debounce circuitry - a verified feature of the DS1834AU+T&R used in industrial and telecom applications where operator-initiated recovery is essential.
DS1834AU+T&R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- EconoReset
- Package/Case:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Multi-Voltage Supervisor
- Number of Voltages Monitored:
- 2
- Voltage - Threshold:
- 3.3V, 5V
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- 200ms Minimum
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-uMAX/uSOP
DS1834AU+T&R FAQ
1.How can I place an order for DS1834AU+T&R through Aetrix?
Please submit a Request for Quotation (RFQ) for DS1834AU+T&R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS1834AU+T&R reliable?
The price and inventory of DS1834AU+T&R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS1834AU+T&R is usually 5 days.
3.What payment methods are accepted for DS1834AU+T&R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS1834AU+T&R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS1834AU+T&R?
DS1834AU+T&R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS1834AU+T&R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS1834AU+T&R?
For technical support, including DS1834AU+T&R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS1834AU+T&R requirements.
6.How does Aetrix verify that DS1834AU+T&R is sourced from the original manufacturer or authorized distributors?
All DS1834AU+T&R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS1834AU+T&R meets industry standards.
7.What is the process for return or replacement of DS1834AU+T&R?
All DS1834AU+T&R units undergo pre-shipment inspection (PSI). If there is an issue with DS1834AU+T&R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS1834AU+T&R part is unused and in its original packaging.
Return procedure for DS1834AU+T&R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DS1834AU+T&R Tags

-
MIC826SYMT-TR
Microchip Technology

-
APX803S-31SA-7
Diodes Incorporated

-
APX803L20-29SA-7
Diodes Incorporated
-
TPS3828-33DBVR
Texas Instruments

-
V6340RSP3B+
EM Microelectronic

-
EM6325CXSP5B-2.9+
EM Microelectronic

-
MCP120T-300I/TT
Microchip Technology

-
MCP130T-315I/TT
Microchip Technology

-
MCP120T-475I/TT
Microchip Technology

-
MCP111T-300E/TT
Microchip Technology

-
MCP120T-315I/TT
Microchip Technology

-
MCP809T-315I/TT
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

