Analog Devices Inc./Maxim Integrated DS1867E-010+T&R

Overview

DS1867E-010+T&R from Maxim Integrated (now Analog Devices) is a dual nonvolatile digital potentiometer with EEPROM, featuring two 256-position wiper settings, 10 kΩ end-to-end resistance per pot, ±0.75 LSB absolute linearity, and operation from single 5V supply. It serves as a programmable resistor in precision gain/attenuation circuits for industrial instrumentation and sensor signal conditioning.

For engineers reviewing the DS1867E-010+T&R datasheet, DS1867E-010+T&R pinout, DS1867E-010+T&R application, or DS1867E-010+T&R equivalent, key selection criteria include nonvolatile wiper retention, 3-wire serial interface timing (10 MHz max CLK), stacked/cascaded configuration support, and industrial temperature range (-40°C to +85°C).

Technical Context

The DS1867E-010+T&R implements two independent 256-step resistive dividers controlled via a 3-wire serial port (RST, CLK, DQ), with wiper positions stored in on-chip EEPROM. Each potentiometer supports series stacking to achieve 512-step resolution and 20 kΩ total resistance while maintaining 10 kΩ per segment.

Its internal 17-bit I/O shift register holds two 8-bit wiper values plus a stack-select bit; data is loaded on rising CLK edges after RST activation. Nonvolatility is ensured by automatic EEPROM write during power-down when VCC drops below 4.5 V, requiring ≥4 ms between 4.5 V and 3.0 V for guaranteed storage.

Key Specifications

Pinout & Package

DS1867E-010+T&R is packaged in a 16-pin SOIC (300-mil) surface-mount package with exposed pad not present; pinout matches the DS1867 family's standardized 16-pin SOIC layout.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual digital potentiometer applications.

Compared with AD5232BRUZ10 and MCP42010-I/P, DS1867E-010+T&R uniquely combines nonvolatility, 3-wire simplicity, and hardware-supported stacking-making it optimal for self-contained calibration modules and multi-pot configurations where EEPROM endurance and minimal interface overhead matter.

Availability

DS1867E-010+T&R is available at Aetrix Electronics and suitable for industrial instrumentation calibration, programmable gain amplifiers, fixed-attenuator networks, and multi-channel sensor biasing requiring stable component supply and long-term parameter retention.

Supply support for DS1867E-010+T&R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices (formerly Maxim Integrated) designs high-performance analog, mixed-signal, and digital signal processing ICs for precision measurement, power management, and connectivity.

The DS1867E-010+T&R belongs to Maxim's legacy digital potentiometer product line, engineered specifically for nonvolatile, low-power, and space-constrained analog trimming in industrial and test equipment.

FAQ

What is the resistance tolerance and temperature coefficient of the DS1867E-010+T&R?

The DS1867E-010+T&R has a ±20% end-to-end resistance tolerance at 25°C and a temperature coefficient of 750 ppm/°C. These specifications ensure predictable drift behavior across the industrial temperature range (-40°C to +85°C), supporting stable gain-setting in analog signal chains where thermal stability is critical. The DS1867E-010+T&R maintains its 10 kΩ nominal value with calibrated repeatability despite ambient shifts.

Does the DS1867E-010+T&R require external components for EEPROM write protection or power-down sequencing?

No, the DS1867E-010+T&R performs automatic EEPROM wiper storage during power-down without external circuitry. When VCC falls below 4.5 V, the device initiates an internal write sequence provided the voltage remains above 3.0 V for ≥4 ms. This autonomous behavior eliminates need for supervisor ICs or RC timing networks, simplifying design around the DS1867E-010+T&R in compact systems.

Can the DS1867E-010+T&R operate from ±5V supplies, and how does VB pin affect functionality?

Yes, the DS1867E-010+T&R supports ±5V operation: tie VB to –5V and VCC to +5V to enable bipolar analog signal handling across the resistor terminals. With VB = GND, the device operates in unipolar 0–5V mode. The VB pin defines the lower voltage limit for L/H/W pins; violating VB-relative voltage limits risks latch-up. For standard 5V-only use, VB must be connected to GND - this is required for correct DS1867E-010+T&R operation.

How does the stacked configuration of the DS1867E-010+T&R affect resolution and output impedance?

In stacked mode, the DS1867E-010+T&R connects both 10 kΩ pots in series, yielding 20 kΩ total resistance and 512 effective wiper positions while preserving 10 kΩ per segment. Output is taken at SOUT, which multiplexes between W0 and W1 based on the stack-select bit. Wiper resistance remains 400–1000 Ω, unchanged from single-pot operation - ensuring consistent loading on downstream high-impedance nodes in DS1867E-010+T&R applications.

What are the timing requirements for reliable communication with the DS1867E-010+T&R via its 3-wire serial interface?

The DS1867E-010+T&R requires minimum CLK pulse width of 50 ns, data setup time of 30 ns, and data hold time of 10 ns. RST must be held high ≥200 ns before first CLK edge, and propagation delay from CLK to COUT is ≤70 ns. These specs allow reliable interfacing with most 8-bit MCUs at ≤10 MHz clock rates. Violating these timings may cause incomplete 17-bit register loading, resulting in incorrect wiper positioning in the DS1867E-010+T&R.