Analog Devices Inc./Maxim Integrated DS2117MX/T&R

Overview

DS2117MX/T&R from Maxim Integrated is a multimode Ultra3 LVD/SE SCSI bus terminator IC that automatically selects low-voltage differential (LVD) or single-ended (SE) termination based on DIFFSENSE line voltage detection. It provides precision 110Ω SE termination and 105Ω differential / 150Ω common-mode LVD termination, with thermal shutdown protection and SCSI bus hot-plug compatibility for wide SCSI backplane applications.

For engineers reviewing the DS2117MX/T&R datasheet, DS2117MX/T&R pinout, DS2117MX/T&R application, or DS2117MX/T&R equivalent, key selection criteria include auto-sensing DIFFSENSE logic decoding, 3pF output capacitance, 5% resistor tolerance, dual-reference voltage generation (1.25V/2.85V), and ISO-controlled bus isolation capability.

Technical Context

The DS2117MX/T&R implements trinary DIFFSENS voltage decoding (HVD <0.6V, SE 0.7–1.9V, LVD 2.4–VTPWR+0.3V) using two comparators and a NAND gate to determine bus mode. Its internal bandgap reference feeds dual amplifiers to generate 1.25V (LVD) and 2.85V (SE) reference voltages, dynamically switching termination resistor configurations and RP-pin grounding accordingly.

Termination is implemented via laser-trimmed resistor strings: nine 110Ω resistors for SE mode, and precision current-source-driven strings yielding 105Ω differential impedance in LVD mode. The ISO pin enables hardware-isolation of RxP/RxN pins during HVD detection or thermal shutdown, while maintaining active SE/LVD/HVD status outputs.

Key Specifications

Pinout & Package

DS2117MX/T&R is housed in a 36-pin SSOP package (15.2–15.54mm × 10.11–10.52mm body, 0.8mm pitch) with exposed heat-sink ground pads (pins 8,9,10,26,27,28) for thermal management.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar SCSI termination applications.

Compared with DS2117MX/T&R, DS2118MX/T&R offers incremental improvements in DIFFSENSE filtering and thermal behavior but maintains identical pinout and functional coverage; MAX3221ESE+ serves an entirely different interface standard and must be excluded from SCSI termination use cases.

Availability

DS2117MX/T&R is available at Aetrix Electronics and suitable for wide SCSI backplane termination, Ultra160/M RAID controller interfaces, and SCSI hot-swap enclosure management requiring stable component supply and long-term industrial availability.

Supply support for DS2117MX/T&R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) is a semiconductor company specializing in analog, mixed-signal, and power management ICs for industrial, communications, and computing systems.

The DS2117MX/T&R belongs to Maxim's SCSI interface product line, designed specifically to solve multimode bus termination challenges in enterprise storage subsystems with backward compatibility requirements.

FAQ

What is the primary function of the DS2117MX/T&R in a SCSI system?

The DS2117MX/T&R serves as an auto-sensing multimode SCSI terminator that dynamically selects between low-voltage differential (LVD) and single-ended (SE) termination based on the voltage detected on the DIFFSENSE line. It ensures proper impedance matching and biasing for Ultra3-compliant SCSI buses, enabling interoperability between legacy SE and modern LVD devices without manual configuration. The DS2117MX/T&R also provides HVD isolation and thermal shutdown protection.

How does the DS2117MX/T&R determine whether to use LVD or SE termination?

The DS2117MX/T&R uses internal comparators to monitor the DIFFSENS line voltage: values below 0.6V indicate HVD mode, 0.7–1.9V indicate SE mode, and 2.4–VTPWR+0.3V indicate LVD mode. This trinary decoding logic-implemented with two comparators and a NAND gate-drives the control circuitry to switch reference voltages (1.25V for LVD, 2.85V for SE), configure resistor networks, and ground RP pins as needed. The DS2117MX/T&R performs this detection autonomously without external intervention.

What is the purpose of the ISO pin on the DS2117MX/T&R?

The ISO (Isolation) pin on the DS2117MX/T&R enables hardware-controlled disconnection of the RxP/RxN termination terminals from the SCSI bus. When pulled high, it isolates the bus pins, grounds the VREF output, and maintains active SE/LVD/HVD status outputs-critical during HVD device detection or thermal shutdown events. This prevents loading of incompatible bus segments and protects downstream circuitry. The DS2117MX/T&R retains full mode visibility even while isolated, supporting diagnostic transparency in fault conditions.

Can the DS2117MX/T&R be used on a narrow (50-pin) SCSI bus?

No, the DS2117MX/T&R is designed exclusively for wide (68-pin) SCSI buses. Its pinout provides nine differential pairs (RxP/RxN) corresponding to the 16 data lines plus control signals of a wide SCSI interface. A narrow SCSI bus requires only five termination pairs, and using the DS2117MX/T&R would result in unconnected or misrouted pins, violating SCSI electrical specifications. For narrow SCSI, discrete or dedicated narrow-terminator ICs must be used instead of the DS2117MX/T&R.

What decoupling capacitors are required for stable operation of the DS2117MX/T&R?

The DS2117MX/T&R requires three critical decoupling capacitors: a 4.7µF capacitor between VREF (Pin 1) and ground to maintain reference voltage regulation; a 2.2µF capacitor between TPWR (Pin 36) and ground; and a 0.01µF high-frequency ceramic capacitor also on TPWR. Additionally, a 0.1µF capacitor is recommended on DIFF_CAP (Pin 21) if external filtering is desired alongside the internal digital filter. All capacitors must be placed as close as possible to their respective pins to minimize inductance and ensure signal integrity on high-speed SCSI buses.