Analog Devices Inc./Maxim Integrated DS3172
- Part No.:
- DS3172
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Telecom
- Package:
- 400-BBGA
- Datasheet:
-
DS3172.pdf
- Description:
- DS3172 DUAL DS3/E3 TRANSCEIVER
- Quantity:
- Payment:

- Shipping:

Inventory:3,909
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
DS3172 from Maxim Integrated is a dual-port DS3/E3 single-chip transceiver integrating two independent LIUs and framers, supporting M23/C-bit DS3 and G.751/G.832 E3 formats, with on-chip HDLC controllers, BERTs, jitter attenuator, and clock rate adapter - deployed in multiservice access platforms requiring dual-line TDM interface consolidation.
For engineers reviewing the DS3172 datasheet, DS3172 pinout, DS3172 application, or DS3172 equivalent, this device serves as a high-density, thermally enhanced TE-PBGA solution for telecom line card designs needing simultaneous DS3 and E3 support, low-power 3.3V operation, and JTAG-compliant testability.
Technical Context
The DS3172 implements two fully independent DS3/E3 channels, each with dedicated receive clock/data recovery, transmit waveshaping, and configurable framing (M23, C-bit, G.751, G.832). Each port supports B3ZS/HDB3 encoding/decoding and features a programmable jitter attenuator that can be placed in either transmit or receive path.
It integrates an 8-/16-bit microprocessor interface, IEEE 1149.1 JTAG test port, and clock rate adapter generating 44.736MHz (DS3) or 34.368MHz (E3) from a single reference (DS3, E3, or STS-1 frequency), enabling simplified system clocking architecture.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Port Count | Dual-channel - enables two independent DS3 or E3 physical interfaces on one die, reducing board space vs. discrete solutions. |
| Supported Line Standards | DS3 (M23, C-bit), E3 (G.751, G.832) - full compliance with ITU-T and ANSI T1.102 specifications for TDM transport. |
| Line Interface | 75Ω coaxial cable up to 380m (DS3) or 440m (E3) - eliminates need for external repeaters in typical central office or metro access links. |
| Power Dissipation | ~1.73W at 3.3V - enables thermal management in dense line cards without forced air cooling. |
| Operating Temperature | 0°C to +70°C - qualified for commercial-grade telecom infrastructure applications including MSAPs and IADs. |
| Package | 400-pin TE-PBGA (27mm × 27mm, 1.27mm pitch) - provides high I/O density and enhanced thermal performance over standard PBGA. |
| Interface Type | 8-/16-bit generic microprocessor bus with RDY, ALE, CS, RD/DS, WR/R/W - simplifies integration with ARM, MIPS, or proprietary control processors. |
Pinout & Package
DS3172 uses a 400-ball TE-PBGA package (27mm × 27mm, 1.27mm pitch) with thermal enhancement for telecom line card deployment. Pin assignments follow Maxim's standardized DS317x family layout, supporting pin compatibility across DS3171–DS3174 variants.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| TXPn / TXNn | Differential Transmit Output | Drives B3ZS/HDB3-encoded DS3/E3 signal onto 75Ω coax; requires 1:2ct transformer per port. |
| RXPn / RXNn | Differential Receive Input | Accepts AMI/B3ZS/HDB3 signals; performs clock/data recovery and optional decoding. |
| RLCLKn / TLCLKn | Receive/Transmit Line Clock | Provides recovered or generated line-rate clock (44.736MHz/34.368MHz) for backplane synchronization. |
| D[15:0] / A[10:1] | Microprocessor Data/Address Bus | Supports 8- or 16-bit parallel host interface with byte-swap and ready-strobe modes for flexible controller integration. |
| INT / RDY | Interrupt & Ready Signals | Indicates register access completion or event-triggered interrupt (e.g., AIS, LOS, BERT error) to host processor. |
| JTMS / JTCK / JTDI / JTDO | JTAG Test Access Port | Enables IEEE 1149.1 boundary scan, debug, and production test without requiring additional test fixtures. |
Key Features
| Feature | Design Value |
|---|---|
| Per-port independent configuration | Each of two ports can be set to DS3 or E3 mode, framing type, and line interface mode without affecting the other - enables mixed-service line cards. |
| Integrated clock rate adapter | Generates precise 44.736MHz or 34.368MHz clocks from a single 13.584MHz, 15.36MHz, or 51.84MHz reference - reduces clock tree complexity and component count. |
| On-chip BERT with PRBS | Supports PRBS-20 pattern generation/detection per port for field-installation loopback testing and link integrity validation without external test gear. |
| HDLC overhead controller with 256-byte FIFO | Handles DS3 PMDL, G.751 Sn bit, and G.832 NR/GC byte insertion/extraction - offloads protocol processing from host CPU. |
| Flexible loopback modes | Line, diagnostic, framer, payload, and analog loopbacks with AIS insertion capability - accelerates bring-up and fault isolation in lab and field environments. |
Applications
| Access Concentrators | Multiservice Access Platform (MSAP) |
|---|---|
Use Scenario: Aggregating multiple T1/E1 lines into DS3/E3 trunks for upstream transport to core networks. IC Role / Device Role / Timing Role: Dual-port DS3/E3 transceiver providing physical layer framing, line driving, and clock recovery for two independent aggregation paths. Use Value: Eliminates need for separate framer + LIU ICs per port, reducing BOM cost and PCB area by >40% versus discrete implementations. |
Use Scenario: Serving DSL, PON, and wireless backhaul traffic over legacy TDM infrastructure with service-aware OAM. IC Role / Device Role / Timing Role: Dual-channel TDM interface IC performing DS3/E3 framing, HDLC overhead handling, and performance monitoring. Use Value: Enables real-time PMDL/Sn/NR/GC byte analysis and trail trace for SLA compliance reporting in carrier-grade access systems. |
| SONET/SDH ADM and Muxes | Routers and Switches with TDM Edge |
Use Scenario: Providing DS3/E3 tributary interfaces for add/drop multiplexing in SONET OC-3/OC-12 edge nodes. IC Role / Device Role / Timing Role: Dual-port framer/LIU bridging electrical DS3/E3 signals to SONET mapping logic and backplane bus. Use Value: Supports seamless interworking between PDH and SDH layers via standardized G.751/G.832 framing and jitter attenuation aligned to GR-1244-CORE. |
Use Scenario: Adding legacy TDM connectivity to IP routers for enterprise voice trunking or leased-line backup. IC Role / Device Role / Timing Role: Dual-channel DS3/E3 transceiver interfacing to router's internal bus while maintaining strict jitter transfer compliance. Use Value: Delivers <1.0 UI peak-to-peak jitter transfer per ITU-T G.823, ensuring interoperability with legacy carrier switches and PBXs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar DS3/E3 transceiver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS3172N | Same functionality with extended temperature range (-40°C to +85°C); identical pinout and register map. | Required for industrial or outdoor cabinet deployments where ambient exceeds 70°C. | Select DS3172N when operating environment exceeds 70°C; otherwise DS3172 suffices for commercial indoor telecom equipment. |
| DS3182 | Successor family with enhanced jitter performance, lower power (~1.4W), and added E4 support; pin-compatible but not register-compatible. | Targeted at next-gen MSPPs requiring tighter jitter specs and future-proofing for E4 migration. | Choose DS3182 for new designs prioritizing power efficiency and long-term roadmap alignment; DS3172 remains optimal for cost-sensitive, volume-deployed MSAPs. |
Compared with DS3172N and DS3182, the DS3172 offers the lowest unit cost and proven reliability in commercial-temperature telecom line cards, while retaining full functional equivalence to DS3172N and backward compatibility with DS317x-based firmware and PCB layouts.
Availability
DS3172 is available at Aetrix Electronics and suitable for multiservice access platforms, digital cross-connect systems, and integrated access devices requiring stable component supply, long-lifecycle support, and traceable sourcing for telecom infrastructure programs.
Supply support for DS3172 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) is a semiconductor company specializing in precision analog, mixed-signal, and high-reliability ICs for communications, industrial, and computing markets.
The DS3172 belongs to Maxim's DS317x family of single-chip DS3/E3 transceivers, designed specifically for compact, low-power, multiport TDM line interface cards in access and metro network equipment.
FAQ
What is the primary function of the DS3172 in telecom systems?
The DS3172 functions as a dual-port DS3/E3 single-chip transceiver, integrating line interface units (LIUs), framers/formatters, HDLC controllers, and BERTs. It performs clock/data recovery, B3ZS/HDB3 encoding/decoding, and M23/C-bit DS3 or G.751/G.832 E3 framing. In telecom systems, the DS3172 enables compact, low-power physical layer interfacing for access concentrators and MSAPs without external framer or LIU components.
Does the DS3172 support both DS3 and E3 standards simultaneously?
Yes, the DS3172 supports both DS3 and E3 standards - but not simultaneously on the same port. Each of its two ports can be independently configured for DS3 (M23 or C-bit) or E3 (G.751 or G.832) operation. This allows mixed-mode deployment, such as one port running DS3 for North American trunking and the other running E3 for European interconnection, all within a single DS3172 device.
What package type and thermal characteristics does the DS3172 use?
The DS3172 uses a 400-ball thermally enhanced plastic BGA (TE-PBGA) package measuring 27mm × 27mm with 1.27mm ball pitch. Its thermal design supports ~1.73W power dissipation at 3.3V, with junction-to-board thermal resistance optimized for conduction-cooled telecom line cards. The package is rated for 0°C to +70°C operation and includes exposed thermal pad for PCB heat sinking.
How does the DS3172 handle clock generation and jitter requirements?
The DS3172 incorporates an integrated clock rate adapter that generates precise 44.736MHz (DS3) or 34.368MHz (E3) clocks from a single reference (13.584MHz, 15.36MHz, or 51.84MHz). It also includes a programmable jitter attenuator configurable in either transmit or receive path, meeting ITU-T G.823 jitter transfer and generation limits for DS3/E3 applications.
Is the DS3172 pin-compatible with other devices in its family or successor series?
Yes, the DS3172 is pin-compatible with DS3171 (single), DS3173 (triple), and DS3174 (quad) - enabling scalable port density on the same PCB layout. It is also pin-compatible with the DS316x and DS318x families, though register maps and some features differ. Firmware and hardware revisions must be validated per device, but mechanical and electrical interface compatibility is maintained across these families.
DS3172 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 400-BBGA
- Packaging:
- Bulk
- Product Status:
- Active
- Function:
- Single-Chip Transceiver
- Interface:
- DS3, E3
- Number of Circuits:
- 2
- Voltage - Supply:
- 3.135V ~ 3.465V
- Current - Supply:
- 328mA
- Power (Watts):
- -
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 400-TE-PBGA (27x27)
DS3172 FAQ
1.How can I place an order for DS3172 through Aetrix?
Please submit a Request for Quotation (RFQ) for DS3172 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS3172 reliable?
The price and inventory of DS3172 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS3172 is usually 5 days.
3.What payment methods are accepted for DS3172?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS3172 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS3172?
DS3172 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS3172 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS3172?
For technical support, including DS3172 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS3172 requirements.
6.How does Aetrix verify that DS3172 is sourced from the original manufacturer or authorized distributors?
All DS3172 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS3172 meets industry standards.
7.What is the process for return or replacement of DS3172?
All DS3172 units undergo pre-shipment inspection (PSI). If there is an issue with DS3172, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS3172 part is unused and in its original packaging.
Return procedure for DS3172:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DS3172 Tags

-
LMC567CMX/NOPB
Texas Instruments

-
LM567CMX/NOPB
Texas Instruments

-
LM567CM/NOPB
Texas Instruments

-
VSC8531XMW-02
Microchip Technology

-
VSC8531XMW-05
Microchip Technology

-
GPY115C0VI
MaxLinear, Inc.
-
SI32185-A-FMR
Skyworks Solutions Inc.
-
VSC8541XMV-05
Microchip Technology

-
SI32178-B-FM1R
Skyworks Solutions Inc.

-
GPY215C0VI
MaxLinear, Inc.

-
CPC7514ZTR
Littelfuse Inc.

-
VSC8502XML-03
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

