Texas Instruments DS34RT5110SQE/NOPB
- Part No.:
- DS34RT5110SQE/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Video Processing
- Package:
- 48-WFQFN Exposed Pad
- Datasheet:
-
DS34RT5110SQE/NOPB.pdf
- Description:
- IC VIDEO RETIMER 48WQFN
- Quantity:
- Payment:

- Shipping:

Inventory:214
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Product details
Overview
DS34RT5110SQE/NOPB from Texas Instruments is a 10.2 Gbps HDMI/DVI retimer IC with per-channel CDR, configurable input equalization (up to 27 dB boost), and output de-emphasis (0–9 dB). It supports TMDS data rates from 250 Mbps to 3.4 Gbps per channel and delivers ≤0.10 UI total output jitter at 3.4 Gbps - enabling multi-hop extension of 28 AWG HDMI cables beyond 25 meters for 1080p/12-bit color.
For engineers reviewing the DS34RT5110SQE/NOPB datasheet, DS34RT5110SQE/NOPB pinout, DS34RT5110SQE/NOPB application, or DS34RT5110SQE/NOPB equivalent, this device is selected for high-fidelity signal regeneration in HDMI/DVI repeaters, matrix switches, and long-cable source/sink interfaces where deterministic jitter reduction and cable loss compensation are critical.
Technical Context
The DS34RT5110SQE/NOPB implements three independent TMDS data channels, each with a dedicated CDR and programmable equalizer, plus a separate clock channel with high-performance PLL. Its CDR loop bandwidth scales with data rate (~2.25 MHz at 2.25 Gbps) and supports automatic lock detection via the LOCK pin.
Input equalization uses eight discrete boost levels set by EQ[2:0] pins; output de-emphasis offers four steps (0/–3/–6/–9 dB) controlled by DE[1:0]; differential output voltage (VO) is resistor-adjustable (12 kΩ or 24 kΩ at VOD_CRL) for DC- or AC-coupled CAT5e/CAT6 extension.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Data Rate | 250 Mbps to 3.4 Gbps per TMDS channel - supports HDMI v1.3a and DVI v1.0 full bandwidth including 1080p/48-bit color. |
| Total Throughput | 10.2 Gbps (3 × 3.4 Gbps + clock) - matches maximum TMDS payload of HDMI v1.3a. |
| Output Jitter | ≤0.10 UIp-p at 3.4 Gbps - provides timing margin for cascaded links and stringent sink receivers. |
| Equalization Range | 0–27 dB boost (8 settings via EQ2/EQ1/EQ0) - compensates up to 25+ m of 28 AWG STP cable loss. |
| De-Emphasis Levels | 0, –3, –6, –9 dB (2-bit control) - optimizes driving capability for FR4 traces or extended UTP runs. |
| Supply Voltage | 3.3 V ±5% - requires low-noise 3.3 V rail with 0.1 µF bypass per VDD pin. |
| Package | 7 mm × 7 mm, 48-pin WQFN (RHS0048A) - exposes thermal pad (DAP) tied to GND for thermal management. |
Pinout & Package
DS34RT5110SQE/NOPB is housed in a 7 mm × 7 mm, 48-pin WQFN package (TI package code RHS0048A) with exposed thermal pad (DAP) connected to GND. Pinout includes three TMDS data channel pairs (D_IN0± to D_IN2±, D_OUT0± to D_OUT2±), one clock channel pair (C_IN±, C_OUT±), and 12 control/analog pins for equalization, de-emphasis, enable, mode, signal detect, lock indication, loop filter, and VO control.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| C_IN+, C_IN− | TMDS clock input | Differential CML inputs with on-chip 50 Ω termination to VDD - accept raw HDMI/DVI clock signals up to 340 MHz. |
| D_IN0+ to D_IN2− | TMDS data inputs | Three independent CML differential input pairs with integrated 50 Ω termination - feed per-channel equalizers and CDRs. |
| C_OUT+, C_OUT− | TMDS clock output | Open-collector CML outputs regenerated by PLL - deliver low-jitter clock synchronized to recovered data. |
| D_OUT0+ to D_OUT2− | TMDS data outputs | Three independent open-collector CML outputs with programmable de-emphasis - drive downstream HDMI/DVI sinks or next-hop retimers. |
| EQ2, EQ1, EQ0 | Equalization control | LVCMOS inputs selecting one of eight equalizer gain settings (0–27 dB) - configure per-cable-loss profile. |
| DE1, DE0 | De-emphasis control | LVCMOS inputs selecting 0/–3/–6/–9 dB output conditioning - optimize signal integrity for trace/cable loss. |
| EN, BYPASS, MODE | Functional mode control | LVCMOS inputs enabling standby (EN), disabling retiming (BYPASS), or bypassing clock channel (MODE) - support multi-hop jitter management. |
| SD, LOCK | Status outputs | LVCMOS outputs indicating valid signal presence (SD) and PLL lock status (LOCK) - enable automatic power sequencing. |
| VOD_CRL | Output voltage control | Analog input setting differential output swing (1000 mVp-p) via external resistor (12 kΩ for AC-coupled, 24 kΩ for DC-coupled). |
| LFp, LFn | PLL loop filter | Analog pins requiring external RC network (3.3 kΩ + 2.2 nF) - stabilize clock channel PLL for low-jitter regeneration. |
Key Features
| Feature | Design Value |
|---|---|
| Dedicated CDR per data channel | Enables independent jitter cleanup and timing realignment across all three TMDS data lanes - essential for skew-tolerant multi-hop extension. |
| Configurable input equalization | Eight programmable boost levels (0–27 dB) compensate varying cable losses without external components - supports both STP and low-skew UTP deployments. |
| Resistor-adjustable output voltage | Single external resistor (12 kΩ or 24 kΩ) sets 1000 mVp-p VO for either DC- or AC-coupled CAT5e/CAT6 interfaces - simplifies system-level biasing. |
| Multi-hop jitter management | MODE pin bypasses clock regeneration on intermediate hops to minimize cumulative jitter - enables >60 m total reach with two cascaded devices. |
| Integrated signal detect & lock indicators | SD and LOCK LVCMOS outputs provide real-time status for automated power sequencing and fault reporting - reduces firmware overhead in embedded repeaters. |
Applications
| HDMI/DVI Repeater Box | Digital Video Matrix Switch |
|---|---|
Use Scenario: Extending HDMI signals over 20+ meters of 28 AWG STP cable between AV sources and displays in commercial installations. IC Role / Device Role / Timing Role: Retimer with per-channel CDR and adaptive equalization - recovers degraded TMDS signals and regenerates low-jitter clock/data for downstream sinks. Use Value: Enables reliable 1080p/12-bit color transmission beyond native HDMI cable limits while maintaining <0.10 UI jitter compliance. | Use Scenario: Centralized routing of multiple HDMI sources to multiple displays in security control rooms or broadcast studios. IC Role / Device Role / Timing Role: Signal conditioner at matrix switch outputs - cleans PCB-induced jitter and equalizes long trace paths to maintain TMDS eye integrity. Use Value: Prevents timing violations at display inputs caused by routing complexity, supporting simultaneous 4K-capable outputs. |
| HDMI Source Device (e.g., GPU) | HDMI Sink Device (e.g., Projector) |
Use Scenario: Integrating into graphics cards or media players to drive long HDMI cables to wall-mounted displays. IC Role / Device Role / Timing Role: Output driver with programmable de-emphasis - pre-compensates for cable attenuation before signal leaves the PCB. Use Value: Eliminates need for active cables or external redrivers; supports up to 30 m CAT6 extension at 2.25 Gbps with <0.20 UI jitter. | Use Scenario: Embedding in projectors or monitors to receive weak or distorted HDMI signals from distant sources. IC Role / Device Role / Timing Role: Input equalizer and clock recovery unit - restores signal amplitude and timing margins before internal video processing. Use Value: Recovers signals from >25 m of 28 AWG cable at 3.4 Gbps, preserving deep color and audio return channel (ARC) functionality. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar HDMI/DVI retimer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN65DP159RSBT | Supports DisplayPort 1.2a and HDMI 2.0 (6 Gbps); higher data rate but no EQ/DE configuration pins - fully auto-adaptive. | Targeted at DP/HDMI dual-mode systems; lacks manual EQ/DE tuning for legacy HDMI-only infrastructure. | Select SN65DP159RSBT when migrating to HDMI 2.0 or DP-based designs requiring plug-and-play operation. |
| PTN3362BS/AJ | PCIe Gen2-compliant retimer with HDMI 1.4 support (3.4 Gbps); integrates HDCP key storage and sideband channel handling. | Designed for embedded PCs and docking stations requiring HDCP 2.2 and USB-C Alt Mode compatibility. | Choose PTN3362BS/AJ for systems needing built-in content protection and USB-C integration alongside HDMI retiming. |
Compared with SN65DP159RSBT and PTN3362BS/AJ, the DS34RT5110SQE/NOPB offers granular manual control of equalization and de-emphasis - critical for optimizing legacy HDMI/DVI infrastructure with known cable types and lengths, while maintaining pin-level compatibility with TI's established design ecosystem.
Availability
DS34RT5110SQE/NOPB is available at Aetrix Electronics and suitable for HDMI/DVI repeater boxes, digital video matrix switches, and long-cable source/sink interfaces requiring stable component supply and guaranteed long-term availability.
Supply support for DS34RT5110SQE/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company specializing in analog, embedded processing, and logic technologies with broad industrial and consumer design support.
The DS34RT5110SQE/NOPB belongs to TI's Display Interface product line, engineered specifically for high-reliability HDMI/DVI signal integrity restoration in professional AV, broadcast, and commercial display systems.
FAQ
What is the maximum supported cable length for DS34RT5110SQE/NOPB at 3.4 Gbps?
The DS34RT5110SQE/NOPB equalizes and retimes greater than 25 meters of 28 AWG HDMI cable at 3.4 Gbps for 1080p/12-bit color (2.25 Gbps per channel equivalent). With optimal EQ setting (0x06) and AC-coupled CAT6 extension, field deployments achieve up to 30 meters while maintaining ≤0.10 UI total output jitter - verified per SNLS310G test conditions.
How does the MODE pin affect DS34RT5110SQE/NOPB operation in multi-hop configurations?
When MODE = HIGH, the DS34RT5110SQE/NOPB bypasses its clock channel PLL and passes the input clock directly - reducing jitter accumulation on intermediate hops. In a two-hop system, the first DS34RT5110SQE/NOPB uses MODE = HIGH and the final hop uses MODE = LOW (default) to regenerate a clean low-jitter clock for the sink, enabling >60 m total reach.
Can DS34RT5110SQE/NOPB be used with AC-coupled CAT5e/CAT6 cabling?
Yes - DS34RT5110SQE/NOPB supports AC-coupled extension using CAT5e/CAT6. Configure VOD_CRL with 12 kΩ to GND for 1000 mVp-p output swing, add 50 Ω pull-up resistors near source outputs, and place 622 Ω pull-down resistors at sink inputs to set common-mode voltage to 3.05 V. Note: AC coupling violates HDMI source specification but is widely deployed in extenders.
What is the function of the VOD_CRL pin on DS34RT5110SQE/NOPB?
The VOD_CRL pin on DS34RT5110SQE/NOPB sets differential output voltage swing (VO) via an external resistor to GND: 24 kΩ yields 1000 mVp-p for DC-coupled applications; 12 kΩ yields 1000 mVp-p for AC-coupled CAT5e/CAT6 interfaces. Resistor tolerance should be ±5%; values outside 12–24 kΩ are not characterized.
Does DS34RT5110SQE/NOPB support DVI dual-link applications?
Yes - DS34RT5110SQE/NOPB supports DVI dual-link for QXGA/WQXGA resolutions. Two DS34RT5110SQE/NOPB devices are configured in parallel: one handles the primary link (channels 0–2 + clock), the other handles the secondary link (channels 3–5 + clock). This configuration is validated for single dual-link repeater use per TI Application Report SNLA227.
DS34RT5110SQE/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 48-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Not For New Designs
- Function:
- Retimer
- Applications:
- -
- Standards:
- -
- Control Interface:
- -
- Voltage - Supply:
- -
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 48-WQFN (7x7)
DS34RT5110SQE/NOPB FAQ
1.How can I place an order for DS34RT5110SQE/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for DS34RT5110SQE/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS34RT5110SQE/NOPB reliable?
The price and inventory of DS34RT5110SQE/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS34RT5110SQE/NOPB is usually 5 days.
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DS34RT5110SQE/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS34RT5110SQE/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS34RT5110SQE/NOPB?
For technical support, including DS34RT5110SQE/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS34RT5110SQE/NOPB requirements.
6.How does Aetrix verify that DS34RT5110SQE/NOPB is sourced from the original manufacturer or authorized distributors?
All DS34RT5110SQE/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS34RT5110SQE/NOPB meets industry standards.
7.What is the process for return or replacement of DS34RT5110SQE/NOPB?
All DS34RT5110SQE/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with DS34RT5110SQE/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS34RT5110SQE/NOPB part is unused and in its original packaging.
Return procedure for DS34RT5110SQE/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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