Analog Devices Inc./Maxim Integrated DS3991Z+HB

Overview

DS3991Z+HB from Maxim Integrated is a half-bridge CCFL controller IC for LCD backlighting, converting 5V–24V DC input to 300–1400V_RMS AC output at 40–80kHz lamp frequency and supporting 80–300Hz burst-dimming. It integrates dual MOSFET gate drivers (GA/GB), lamp current monitoring (LCM), overvoltage detection (OVD), and supply voltage monitors (SVML/SVMH) for robust fault protection in LCD TV and monitor inverters.

For engineers reviewing the DS3991Z+HB datasheet, DS3991Z+HB pinout, DS3991Z+HB application, or DS3991Z+HB equivalent, key selection criteria include half-bridge topology support, ±5% lamp/DPWM oscillator accuracy, 100%–<10% dimming range, soft-start for audible noise reduction, and integrated lamp-fault detection (open, overcurrent, strike failure, overvoltage).

Technical Context

The DS3991Z+HB implements a half-bridge drive architecture with complementary GA/GB gate outputs driving external logic-level MOSFETs to generate high-voltage AC across the CCFL secondary winding. Its internal 40–80kHz lamp oscillator (±5%) and 80–300Hz DPWM oscillator (±5%) are resistor-programmable via LOSC and POSC pins, enabling precise control of lamp regulation and burst-dimming duty cycle.

Fault handling is hardware-automated: LCM monitors lamp current via external sense resistor; OVD detects overvoltage via capacitor divider; SVML/SVMH provide programmable inverter-supply undervoltage/overvoltage lockouts; and UVLO ensures VCC ≥4.3V before operation. Strike frequency boost (+33%) and soft-start ramp prevent transformer noise and ensure reliable lamp ignition.

Key Specifications

Pinout & Package

DS3991Z+HB is housed in a 16-pin SOIC (150 mils) package with exposed pad not present; thermal dissipation relies on PCB copper area under pins 2–4 and 14. Four VCC pins reduce supply impedance; GND (pin 13) serves as primary signal reference.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar CCFL controller applications.

Compared with MAX16820A and LM3481Q, DS3991Z+HB delivers fully integrated half-bridge control with hardware-automated fault responses, eliminating external protection circuitry and reducing design cycle time by ≥4 weeks for new LCD backlight systems.

Availability

DS3991Z+HB is available at Aetrix Electronics and suitable for LCD TV backlight inverters, LCD monitor power supplies, and industrial HMI display systems requiring stable component supply, long-term lifecycle support, and RoHS-compliant lead-free packaging.

Supply support for DS3991Z+HB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) is a semiconductor company specializing in precision analog, mixed-signal, and power management ICs for industrial, communications, and consumer applications.

The DS3991Z+HB belongs to Maxim's CCFL backlight controller product line, designed specifically to replace discrete transistor-based inverters in LCD displays with integrated, fault-resilient, low-BOM solutions for cost-sensitive volume manufacturing.

FAQ

What is the function of the SLOPE pin on the DS3991Z+HB?

The SLOPE pin on the DS3991Z+HB is a digital input that selects the transfer function of the BRIGHT analog dimming control. When SLOPE = 0, the BRIGHT input uses positive slope mapping (0V = minimum brightness, 3.3V = maximum brightness). When SLOPE = 1, it uses negative slope mapping (0V = maximum brightness, 3.3V = minimum brightness). This flexibility allows the DS3991Z+HB to interface seamlessly with either increasing- or decreasing-voltage dimming sources without external inversion circuitry.

How does the DS3991Z+HB implement lamp strike and what role does frequency boost play?

The DS3991Z+HB implements lamp strike by initially operating the GA/GB gate drivers at a lamp frequency increased by 33% above the nominal setting (e.g., 66.7kHz instead of 50kHz). This frequency boost raises the transformer's open-circuit voltage to ensure reliable cold-cathode ionization. Once lamp current is detected via the LCM input, the DS3991Z+HB automatically returns to the programmed lamp frequency. The entire process is autonomous - no external microcontroller intervention is required for DS3991Z+HB lamp ignition.

Can the DS3991Z+HB drive multiple CCFL lamps simultaneously, and what design considerations apply?

Yes, the DS3991Z+HB can drive multiple CCFL lamps per channel - typical application circuits show up to three lamps in series/parallel configurations for both half-bridge and push-pull topologies. Key design considerations include selecting a transformer with appropriate turns ratio (80:1 for half-bridge per Table 1), ensuring MOSFETs have Q_G < 20nC and breakdown voltage ≥3× inverter supply, and maintaining matched lamp impedances to avoid current imbalance. The DS3991Z+HB's LCM input monitors total channel current, so lamp matching is essential for uniform brightness.

What are the voltage thresholds and behavior of the SVMH and SVML pins on the DS3991Z+HB?

The SVMH and SVML pins on the DS3991Z+HB are high-impedance analog inputs with internal 2.0V comparators. SVMH > 2.0V triggers immediate lamp shutdown and controller reset; SVML < 2.0V does the same. These thresholds are fixed, but trip voltages for the external inverter supply (V_INV) are set by resistor dividers: V_TRIP = 2.0 × (R1 + R2)/R1. For example, to trip SVMH at 15V, use R1 = 100kΩ and R2 = 650kΩ. Both inputs include hysteresis to reject noise, and either can be disabled by tying SVMH to GND or SVML to VCC.

Does the DS3991Z+HB support both analog and digital dimming, and how is the mode selected?

Yes, the DS3991Z+HB supports both analog and digital dimming modes, selected by the PWM_EN pin. When PWM_EN = 0, analog dimming is active: the BRIGHT pin accepts a 0–3.3V DC voltage (slope set by SLOPE pin) to control DPWM duty cycle. When PWM_EN = 1, digital dimming is active: an external 80–300Hz PWM signal applied to the POSC/PWM pin directly modulates lamp brightness, and the BRIGHT/SLOPE pins are ignored. This dual-mode capability makes the DS3991Z+HB compatible with both microcontroller-based and potentiometer-based dimming architectures.