Analog Devices Inc./Maxim Integrated DS80C310-QNG+T&R

Overview

DS80C310-QNG+T&R from Maxim Integrated is a high-speed, 8051-compatible CMOS microcontroller with pin- and instruction-set compatibility to the 80C32. It delivers 2.5× typical execution speed at 25MHz crystal (62.5MHz apparent), features dual data pointers, variable MOVX timing (2–9 machine cycles), three 16-bit timers, 256 bytes of on-chip RAM, and full-duplex serial port - deployed in industrial control systems requiring deterministic real-time response.

For engineers reviewing the DS80C310-QNG+T&R datasheet, DS80C310-QNG+T&R pinout, DS80C310-QNG+T&R application, or DS80C310-QNG+T&R equivalent, key selection considerations include its -40°C to +85°C industrial temperature rating, 44-pin PLCC package, 4-clock-per-machine-cycle core architecture, stretchable MOVX timing for mixed-speed peripherals, and upward compatibility with DS80C320 while omitting select advanced peripherals.

Technical Context

The DS80C310-QNG+T&R implements a streamlined 8051-derived core executing instructions in 4-clock machine cycles (vs. 12 in legacy 8051), enabling single-cycle instructions in 160ns at 25MHz. Its dual DPTR (DPL/DPH at 82h/83h; DPL1/DPH1 at 84h/85h) accelerates block memory moves without software overhead.

Timer/counter operation defaults to 12-clock mode for backward timing compatibility but supports 4-clock mode via CKCON bits (T0M/T1M/T2M); MOVX access speed is programmable (2–9 cycles) using CKCON.2–CKCON.0, and stop-mode power consumption is 1µA with edge-triggered wake-up on INT2–INT5.

Key Specifications

Pinout & Package

DS80C310-QNG+T&R is housed in a 44-pin Plastic Leaded Chip Carrier (PLCC) package with J-lead profile, compatible with standard PLCC sockets and reflow soldering per IPC/JEDEC J-STD-020.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar microcontroller applications.

Compared with DS80C320-QNG+, DS80C310-QNG+T&R provides identical high-speed core execution and PLCC packaging but omits non-essential peripherals - reducing cost and complexity. Against AT89C51-24PI, it delivers 2.5× speed, industrial temperature support, and flexible memory interfacing, making it suitable for demanding embedded upgrades where pin compatibility and firmware reuse are critical.

Availability

DS80C310-QNG+T&R is available at Aetrix Electronics and suitable for industrial automation, legacy system modernization, and smart metering applications requiring stable component supply, long-term obsolescence mitigation, and RoHS-compliant manufacturing.

Supply support for DS80C310-QNG+T&R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) is a semiconductor company specializing in precision analog, mixed-signal, and high-reliability microcontrollers for industrial, medical, and communications markets.

The DS80C310-QNG+T&R belongs to Maxim's high-speed 8051-compatible microcontroller family, designed specifically to accelerate legacy 8051-based systems without requiring PCB redesign or firmware rewrite - targeting industrial control, instrumentation, and embedded communication nodes.

FAQ

What is the maximum crystal frequency supported by DS80C310-QNG+T&R?

The DS80C310-QNG+T&R supports a maximum crystal frequency of 25MHz, enabling an apparent instruction execution rate of 62.5MHz due to its 4-clock-per-machine-cycle architecture. This specification is validated across the full -40°C to +85°C operating temperature range and is documented in the Absolute Maximum Ratings and AC Electrical Characteristics sections of the official datasheet.

Is DS80C310-QNG+T&R pin-compatible with the standard 80C32 microcontroller?

Yes, DS80C310-QNG+T&R is fully pin-compatible with the 80C32 in its 44-pin PLCC variant. All signal names, pin positions, and electrical characteristics align with the 80C32 footprint, allowing direct socket replacement in existing designs. However, DS80C310-QNG+T&R adds new functions on Port 1 pins (e.g., INT2–INT5) that remain inactive unless enabled via SFR configuration.

How does the dual data pointer (DPTR/DPTR1) in DS80C310-QNG+T&R improve memory operations?

The DS80C310-QNG+T&R implements two independent 16-bit data pointers - DPTR (SFR 82h/83h) and DPTR1 (SFR 84h/85h) - selected via DPS bit (SFR 86h). This eliminates software overhead in block memory moves: one pointer holds source address, the other destination, enabling single-instruction address switching and reducing code size and execution time versus manual register saves.

What is the purpose of the MOVX timing stretch feature in DS80C310-QNG+T&R?

The MOVX timing stretch feature in DS80C310-QNG+T&R allows software to configure external data memory access duration from 2 to 9 machine cycles via CKCON.2–CKCON.0. This enables seamless interfacing with both fast SRAM (2-cycle mode) and slow peripherals like LCD controllers or legacy UARTs (up to 9-cycle mode) without external wait-state logic or hardware redesign.

Does DS80C310-QNG+T&R include on-chip program memory (ROM/Flash)?

No, DS80C310-QNG+T&R contains no on-chip program memory. It relies entirely on external ROM or EPROM accessed via the multiplexed P0 address/data bus and P2 address MSB lines. The EA pin must be tied low to enable external program fetches, and the device executes code directly from off-chip memory - consistent with the base 80C31/80C32 architecture.