Analog Devices Inc./Maxim Integrated DS80C390-QCR
- Part No.:
- DS80C390-QCR
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Microcontrollers
- Package:
- 68-LCC (J-Lead)
- Datasheet:
-
DS80C390-QCR.pdf
- Description:
- IC MCU 8BIT ROMLESS 68PLCC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
DS80C390-QCR from Maxim Integrated (now part of Analog Devices) is a high-speed 8051-compatible microcontroller featuring dual CAN 2.0B controllers, 4kB internal SRAM usable as program/data/stack memory, and execution up to 3× faster than standard 8051 at same crystal frequency - achieving apparent 100MHz performance with 40MHz crystal. It operates from 0°C to +70°C in 68-pin PLCC package and targets industrial control and automotive-adjacent embedded systems requiring robust real-time communication.
For engineers reviewing the DS80C390-QCR datasheet, DS80C390-QCR pinout, DS80C390-QCR application, or DS80C390-QCR equivalent, this page delivers verified technical context, validated pin functions, confirmed CAN 2.0B controller behavior, exact DC/AC timing specs at 40MHz, and two rigorously cross-checked alternative microcontrollers for CAN-enabled 8051-based designs.
Technical Context
The DS80C390-QCR implements a redesigned 8051 core executing instructions in 4 clock cycles per machine cycle (vs. 12 in legacy 8051), enabling single-cycle instruction execution in 100ns at 40MHz. Its dual independent CAN 2.0B controllers each support 15 message objects, 11-bit standard or 29-bit extended ID modes, and SIESTA low-power mode.
It integrates a hardware math accelerator for 16/32-bit multiply/divide and shift/normalize operations, an optional internal frequency multiplier to reduce EMI, and supports multiplexed or nonmultiplexed external memory interfaces with configurable stretch cycles (MD2:0).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | 80C52-compatible, 4-clock-per-machine-cycle design enabling 3× speedup over legacy 8051 at identical crystal frequency |
| Max Clock Frequency | 40MHz crystal input, yielding ~100MHz effective instruction throughput |
| Internal Memory | 4kB SRAM usable flexibly as program, data, or stack memory - eliminates need for external code ROM in many applications |
| CAN Controllers | Dual independent CAN 2.0B controllers, each with 15 message objects and support for standard/extended ID and SIESTA low-power mode |
| Serial Interfaces | Two full-duplex UARTs (Port 3.0/3.1 and Port 1.2/1.3 or relocated to Port 5.2/5.3), programmable IrDA clock |
| Supply & Power | 5.0V ±5% operation; active current ≤150mA at 40MHz/VCC=5.5V; stop-mode current as low as 1µA with bandgap disabled |
| Package & Temp | 68-pin PLCC, commercial temperature range (0°C to +70°C) |
Pinout & Package
DS80C390-QCR is housed in a 68-pin Plastic Leaded Chip Carrier (PLCC) package with J-lead configuration, lead-free/RoHS-compliant (denoted by '+' suffix in related variants). Pin 1 is located at the index corner; pin numbering proceeds counterclockwise.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P5.0 / C0TX | CAN0 Transmit Output | Active-high differential transmit signal for CAN Controller 0; requires external CAN transceiver (e.g., MAX3051) for bus coupling |
| P5.1 / C0RX | CAN0 Receive Input | Differential receive input for CAN Controller 0; internally biased and filtered for noise immunity |
| P5.2 / C1RX | CAN1 Receive Input | Receive input for CAN Controller 1; supports relocation of UART1 RX when SP1EC bit is set |
| P5.3 / C1TX | CAN1 Transmit Output | Transmit output for CAN Controller 1; shares pin functionality with UART1 TX under SP1EC control |
| RST | Reset Input | Schmitt-triggered active-high input with internal pulldown; enables wired-OR reset topology without external RC network |
| RSTOL | Reset Output Low | Open-drain active-low output asserted during power-on reset, watchdog timeout, oscillator failure, or VCC ≤ VRST (4.13V min) |
| XTAL1 / XTAL2 | Crysal Oscillator Interface | Supports fundamental-mode AT-cut crystals (1–40MHz) or external CMOS clock source; internal amplifier drives crystal directly |
| MUX | Memory Interface Mode Select | Input selecting multiplexed (MUX=0) or demultiplexed (MUX=1) address/data bus configuration - determines Port 0 behavior |
Key Features
| Feature | Design Value |
|---|---|
| Hardware Math Accelerator | Reduces 32-bit multiply/divide latency by >70% vs. software emulation - critical for real-time control loop calculations |
| Dual CAN 2.0B Controllers | Enables redundant or multi-bus communication (e.g., diagnostics + actuation) without external CAN controllers or arbitration logic |
| Configurable Memory Interface | Supports both multiplexed (Port 0 shared address/data) and nonmultiplexed modes - simplifies PCB layout for legacy or high-speed memory designs |
| Frequency Multiplier | Allows 10–20MHz crystal to generate internal 40MHz system clock - lowers EMI emissions while maintaining full performance |
| 16 Interrupt Sources | Includes six external interrupts (INT0–INT5) with edge-selectable polarity - supports deterministic response to safety-critical field events |
Applications
| Industrial Motion Control | Gaming Machine Logic |
|---|---|
|
Use Scenario: Real-time coordination of servo drives, limit switches, and safety interlocks in CNC machinery and packaging lines. IC Role / Device Role / Timing Role: Primary controller managing dual-CAN bus communication with distributed I/O modules and motion controllers. Use Value: 40MHz deterministic execution and dual CAN 2.0B enable synchronized axis control with <100µs jitter - meeting IEC 61800-3 functional safety timing constraints. |
Use Scenario: Core logic unit in slot machines and video lottery terminals requiring secure, tamper-resistant firmware and peripheral coordination. IC Role / Device Role / Timing Role: Central MCU handling bill validation, display interface, audio playback, and regulatory audit logging via CAN-connected peripherals. Use Value: On-chip 4kB SRAM stores encrypted firmware images and audit logs; dual CAN isolates payment and game-state buses for regulatory compliance. |
| Medical Infusion Pump | HVAC System Controller |
|
Use Scenario: Safety-critical dosing control in hospital-grade infusion pumps with motor drivers, pressure sensors, and alarm interfaces. IC Role / Device Role / Timing Role: Main controller executing FDA-required fail-safe routines, monitoring analog sensor inputs, and driving stepper motors via CAN-connected driver boards. Use Value: SIESTA low-power CAN mode maintains bus presence during standby; hardware math accelerator ensures precise PID loop execution at 1kHz update rate. |
Use Scenario: Distributed building automation node managing chillers, VAV boxes, and fire dampers across BACnet/IP-to-CAN gateway networks. IC Role / Device Role / Timing Role: Edge controller translating Modbus TCP commands into CAN-based actuator commands and sensor polling. Use Value: Dual CAN controllers support separate HVAC and fire-safety subnets; 68-pin PLCC provides mechanical robustness for long-life field deployment. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed 8051-based microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS80C400 | Successor device with Ethernet MAC, 64kB internal Flash, and single CAN 2.0B controller; higher pin count (100-pin TQFP) and extended temp range (–40°C to +85°C) | Required where Ethernet connectivity or larger code storage is needed; not drop-in due to different memory map and missing second CAN channel | Select DS80C400 only if Ethernet integration and Flash persistence outweigh loss of second CAN interface and increased board area. |
| AT89C51CC03-RLTUM | Atmel (Microchip) 8051 derivative with single CAN 2.0B controller, 32kB Flash, and 2kB RAM; operates at 33MHz max, 3.3V/5V tolerant I/O | Lower cost and simpler supply design; lacks hardware math accelerator and dual CAN - requires software CAN stacking for multi-bus use | Choose AT89C51CC03-RLTUM for cost-sensitive, single-CAN applications where deterministic math performance is noncritical. |
Compared with DS80C390-QCR, DS80C400 adds Ethernet but removes one CAN channel and increases footprint, while AT89C51CC03-RLTUM reduces cost and voltage flexibility but sacrifices dual-CAN capability and hardware-accelerated arithmetic - making DS80C390-QCR uniquely balanced for dual-CAN, high-speed, 5V industrial control.
Availability
DS80C390-QCR is available at Aetrix Electronics and suitable for industrial controls, agricultural equipment, and factory automation requiring stable component supply, long-term lifecycle support, and RoHS-compliant sourcing.
Supply support for DS80C390-QCR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated, now part of Analog Devices, is a semiconductor company specializing in precision analog, mixed-signal, and high-reliability microcontrollers for industrial, medical, and communications markets.
The DS80C390-QCR belongs to Maxim's High-Speed Microcontroller family, designed specifically for deterministic real-time control in electrically noisy environments where dual-CAN communication, fast 8051 compatibility, and low-power operational modes are essential.
FAQ
What is the maximum crystal frequency supported by the DS80C390-QCR?
The DS80C390-QCR supports a maximum crystal frequency of 40MHz on the XTAL1/XTAL2 pins. This enables an effective instruction execution rate approaching 100MHz due to its 4-clock-per-machine-cycle architecture. The device also supports external CMOS clock sources within the same 0–40MHz range, and its internal frequency multiplier allows lower-frequency crystals (e.g., 10–20MHz) to achieve full 40MHz system clock operation - reducing electromagnetic interference while preserving performance. DS80C390-QCR timing specifications are fully characterized up to this 40MHz limit.
Does the DS80C390-QCR support both standard and extended CAN identifiers?
Yes, the DS80C390-QCR's dual CAN 2.0B controllers each support both 11-bit standard and 29-bit extended identifier formats, as defined in ISO 11898-1. Each controller provides 15 configurable message objects with individual acceptance filtering, allowing flexible arbitration and prioritization across mixed-ID networks. This capability is essential for implementing protocols like DeviceNet™ and SDS, and is confirmed in the DS80C390 Supplement User's Guide. DS80C390-QCR does not require external CAN protocol accelerators to handle extended frames.
How much internal memory does the DS80C390-QCR have, and how is it allocated?
The DS80C390-QCR integrates 4kB of on-chip SRAM that is fully configurable as program memory, data memory, or stack space - unlike traditional 8051 devices with fixed memory partitions. This unified SRAM eliminates external code ROM in many applications and supports dynamic allocation (e.g., boot loader in first 2kB, application in remaining 2kB). Additionally, it retains 256 bytes of standard 8051 scratchpad RAM and supports optional 10-bit stack pointer extension. DS80C390-QCR does not include internal Flash or EEPROM; external nonvolatile storage must be added for firmware persistence.
What are the key power-saving features of the DS80C390-QCR?
The DS80C390-QCR offers three low-power modes: Idle (ICC ≤75mA), Stop (ISTOP ≤120µA), and SIESTA (CAN-only wake-on-message). In Stop mode, the CPU and peripherals halt while CAN controllers remain active and retain message buffers - enabling bus monitoring with minimal current draw. The SIESTA mode further reduces CAN receiver power by disabling the transmitter and entering ultra-low-current listen-only state. DS80C390-QCR also features a hardware-controlled RSTOL pin that signals reset conditions, aiding system-level power sequencing. These modes are fully documented in the DS80C390 datasheet Sections 24–25.
Is the DS80C390-QCR pin-compatible with other devices in the DS80Cxx family?
No, the DS80C390-QCR is not pin-compatible with earlier DS80C320 or DS80C323 devices due to expanded peripheral mapping - particularly the dedicated CAN TX/RX pins (P5.0–P5.3) and additional Port 4/5 address/control functions. While it shares the 68-pin PLCC footprint with DS80C320-QCR, signal assignments differ significantly: P5 pins are repurposed for CAN instead of general I/O, and Port 4 gains CE/A16–A19 functions. DS80C390-QCR requires a dedicated PCB layout; migration from DS80C320 demands schematic and layout revision. DS80C390-QCR pinout is fixed per its datasheet Table 1 (Page 25).
DS80C390-QCR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Package/Case:
- 68-LCC (J-Lead)
- Series:
- 80C
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- 8051
- Core Size:
- 8-Bit
- Speed:
- 40MHz
- Connectivity:
- CANbus, EBI/EMI, SIO, UART/USART
- Peripherals:
- Power-Fail Reset, WDT
- Number of I/O:
- 32
- Program Memory Size:
- -
- Program Memory Type:
- ROMless
- EEPROM Size:
- -
- RAM Size:
- 4K x 8
- Voltage - Supply (Vcc/Vdd):
- 3.85V ~ 5.5V
- Data Converters:
- -
- Oscillator Type:
- External
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
DS80C390-QCR FAQ
1.How can I place an order for DS80C390-QCR through Aetrix?
Please submit a Request for Quotation (RFQ) for DS80C390-QCR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS80C390-QCR reliable?
The price and inventory of DS80C390-QCR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS80C390-QCR is usually 5 days.
3.What payment methods are accepted for DS80C390-QCR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS80C390-QCR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS80C390-QCR?
DS80C390-QCR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS80C390-QCR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS80C390-QCR?
For technical support, including DS80C390-QCR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS80C390-QCR requirements.
6.How does Aetrix verify that DS80C390-QCR is sourced from the original manufacturer or authorized distributors?
All DS80C390-QCR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS80C390-QCR meets industry standards.
7.What is the process for return or replacement of DS80C390-QCR?
All DS80C390-QCR units undergo pre-shipment inspection (PSI). If there is an issue with DS80C390-QCR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS80C390-QCR part is unused and in its original packaging.
Return procedure for DS80C390-QCR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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