Analog Devices Inc./Maxim Integrated DS8113-JNG+T&R

Overview

The DS8113-JNG+T&R from Maxim Integrated is a smart card analog front-end IC designed to interface microcontrollers with ISO 7816/EMV/GSM11-11-compliant smart cards. It supports 1.8V, 3V, and 5V card operation, delivers up to 80mA at 5V with ±5% regulation, provides 8kV IEC ESD protection on card lines, and achieves ultra-low stop-mode current of <10nA - enabling use in battery-powered POS terminals and PIN pads.

For engineers reviewing the DS8113-JNG+T&R datasheet, DS8113-JNG+T&R pinout, DS8113-JNG+T&R application, or DS8113-JNG+T&R equivalent, key selection considerations include its triple-voltage VCC generation (1.8V/3V/5V), automatic activation/deactivation sequencer, integrated level-shifting I/O transceivers, and fault detection for short-circuit, overtemperature, and card removal during transactions.

Technical Context

The DS8113-JNG+T&R implements a dedicated internal sequencer that autonomously manages smart card power-up (tACT = 50–220μs) and deactivation (tDEACT = 50–100μs), including controlled VCC ramping, CLK enable timing, and RST assertion. Its clock circuit accepts external crystals up to 20MHz or buffered clocks, with programmable division (×1/2/4/8) via CLKDIV1/CLKDIV2 pins to meet ISO 7816 clock duty-cycle (45–55%) and frequency (0–10MHz) requirements.

It integrates three bidirectional level-shifting transceivers (I/O, AUX1, AUX2) with 11kΩ internal pullups, active pullup pulse (tPU = 100ns), and ±15mA current limiting. The VCC generator uses separate VDDA (≥5.0V) and PGND rails to deliver regulated 5.0V±5% (80mA), 3.0V±8% (65mA), or 1.8V±10% (30mA) to the card, with overload detection at ~120mA and thermal shutdown at +150°C.

Key Specifications

Pinout & Package

DS8113-JNG+T&R is housed in a 28-pin TSSOP package (JEDEC MO-153, 4.4mm × 9.7mm, 0.65mm pitch) with exposed pad for thermal dissipation. Pin functions are validated per Maxim's official DS8113 datasheet Rev 3 (19-5216).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar smart card interface applications.

Compared with MAX3232ESE+ and ST8024BTR, the DS8113-JNG+T&R uniquely integrates full smart card power management, ISO-timed activation/deactivation, 1.8V capability, and certified 8kV ESD - making it the only drop-in solution for EMV Level 1–compliant reader designs requiring minimal host MCU overhead.

Availability

DS8113-JNG+T&R is available at Aetrix Electronics and suitable for POS terminals, banking payment devices, and access control readers requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for DS8113-JNG+T&R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) is a semiconductor company specializing in precision analog, mixed-signal, and power management ICs for industrial, communications, and security applications.

The DS8113-JNG+T&R belongs to Maxim's secure transaction interface product line, engineered specifically to simplify EMV-compliant smart card reader design by integrating power, timing, protection, and level-shifting functions into a single TSSOP package.

FAQ

What voltage ranges does the DS8113-JNG+T&R support for smart card VCC generation?

The DS8113-JNG+T&R supports three regulated smart card supply voltages: 5.0V ±5% (up to 80mA), 3.0V ±8% (up to 65mA), and 1.8V ±10% (up to 30mA). Selection is controlled by the 1_8V (priority) and 5V/3V pins per Table 3 in the datasheet. VDDA must be ≥5.0V to ensure accurate 5V regulation. DS8113-JNG+T&R does not support 2.5V or other intermediate voltages.

How does the DS8113-JNG+T&R handle card insertion and removal events?

The DS8113-JNG+T&R uses dual PRES inputs (active-low and active-high) with an 8ms typical debounce timer to detect card presence. Insertion asserts OFF high after debounce; removal triggers automatic emergency deactivation (RST low, CLK held low, VCC ramped down) and pulls OFF low. DS8113-JNG+T&R distinguishes mechanical bounce from true removal via timing and fault-state reporting.

Can the DS8113-JNG+T&R operate with an external clock source instead of a crystal?

Yes - the DS8113-JNG+T&R accepts a buffered clock signal applied directly to XTAL1, with XTAL2 left unconnected. The internal oscillator is bypassed, and CLK output frequency/division is still controlled by CLKDIV1/CLKDIV2. Crystal operation (across XTAL1/XTAL2) is optional and supports up to 20MHz; external clock must meet VIH/VIL thresholds and slew rate specs per the datasheet.

What is the purpose of the OFF pin on the DS8113-JNG+T&R, and how is it used?

The OFF pin is an active-low open-drain interrupt output signaling card presence (OFF = high) or fault conditions (OFF = low), including short-circuit, overtemperature, VDD dropout, or card removal during a session. It features a 20kΩ internal pullup to VDD. DS8113-JNG+T&R uses OFF to inform the host MCU of status changes without polling, enabling responsive error recovery and power management.

Does the DS8113-JNG+T&R require external components for basic smart card operation?

Yes - DS8113-JNG+T&R requires external decoupling: two capacitors (100nF + 220nF, ESR < 100mΩ) from VCC to CGND; 100nF from VDDA to PGND; and 15pF load capacitors for crystal operation. No external ESD diodes, LDOs, or level shifters are needed. Layout guidelines (e.g., separating PGND/CGND/GND planes) are mandatory for ISO 7816 compliance and noise immunity.