Analog Devices Inc./Maxim Integrated DS8113-RNG+T&R
- Part No.:
- DS8113-RNG+T&R
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Specialized
- Package:
- 28-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
DS8113-RNG+T&R.pdf
- Description:
- IC INTERFACE SPECIALIZED 28SO
- Quantity:
- Payment:

- Shipping:

Inventory:3,029
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
The DS8113-RNG+T&R from Maxim Integrated is a smart card analog front-end IC designed to interface microcontrollers with ISO 7816/EMV/GSM11-11-compliant smart cards. It delivers programmable 1.8V/3V/5V card supply generation (up to 80mA at 5V), integrated ESD protection (8kV IEC), and ultra-low stop-mode current (<10nA), enabling secure, low-power payment terminals and access control readers.
For engineers reviewing the DS8113-RNG+T&R datasheet, DS8113-RNG+T&R pinout, DS8113-RNG+T&R application, or DS8113-RNG+T&R equivalent, key selection considerations include its triple-voltage card power generation, automatic activation/deactivation sequencer, ISO-compliant timing control, and dual-presence detection (PRES/PRES) for robust card insertion sensing.
Technical Context
The DS8113-RNG+T&R implements a dedicated internal sequencer for fully autonomous smart card activation and deactivation, eliminating host firmware overhead. Its clock generation supports external crystal (up to 20MHz) or clock input with selectable division (×1/2/4/8) via CLKDIV1/CLKDIV2 pins, meeting EMV Level 1 timing requirements.
It integrates three independent voltage regulators (5V ±5%, 3V ±8%, 1.8V ±10%), each with overcurrent and thermal fault detection, and employs bidirectional level-shifting transceivers on I/O, AUX1, AUX2 with 11kΩ internal pullups and 15mA current limiting-ensuring safe, compliant communication across all ISO 7816 voltage classes.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Digital Supply Voltage (VDD) | 2.7V to 6.0V - matches host MCU rail; powers digital logic and I/O transceivers |
| Card Supply Voltage Options | 5.0V ±5% / 3.0V ±8% / 1.8V ±10% - hardware-selectable via 1_8V and 5V/3V pins per Table 3 |
| Max Card Supply Current | 80mA @ 5V, 65mA @ 3V, 30mA @ 1.8V - sufficient for full-speed EMV transaction bursts |
| Stop-Mode Current | <10nA typical - enables multi-year battery life in portable PIN pads and handheld readers |
| ESD Protection (Card Interface) | ≥8kV HBM per IEC 61000-4-2 - protects against user-handling discharge without external TVS |
| Crystal Frequency Support | Up to 20MHz - enables precise 1–5MHz card clock generation per ISO 7816-3 |
| Activation/Deactivation Time | 50–220μs activation, 50–100μs deactivation - meets EMV timing windows for ATR response |
Pinout & Package
DS8113-RNG+T&R is housed in a 28-pin SOIC package (SO/TSSOP-compatible footprint), with exposed pad not present. Pin functions are validated per Maxim's official DS8113 datasheet Rev 3 (19-5216).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2 CLKDIV1, CLKDIV2 | Frequency control inputs | Selects CLK output divider (1/2/4/8) - determines card clock frequency per Table 1 |
| 3 5V/3V | Voltage select control | Logic-high = 5V card mode; overridden by 1_8V pin when active |
| 9, 10 PRES, PRES | Card presence sense inputs | Active-low and active-high dual-sense inputs - enables compatibility with NC/NO mechanical switches |
| 11–13 I/O, AUX1, AUX2 | Smart card data lines | Level-shifted bidirectional transceivers for C7, C4, C8 contacts - include 11kΩ pullups and 15mA short-circuit protection |
| 15 CLK | Smart card clock output | ISO 7816-compliant clock signal (0–10MHz) with 45–55% duty cycle and <8ns rise/fall time |
| 16 RST | Smart card reset output | Drives C2 contact with 200μA sink/source capability and <2μs RSTIN-to-RST delay |
| 17 VCC | Smart card supply output | Regulated 1.8V/3V/5V output - requires local 100nF + 220nF decoupling to CGND |
| 19 CMDVCC | Activation trigger input | Active-low command initiates full hardware sequenced activation/deactivation - no host timing criticality |
| 23 OFF | Status interrupt output | Active-low fault indicator - signals card removal, overcurrent, or overheating during active session |
Key Features
| Feature | Design Value |
|---|---|
| Triple-voltage card supply generator | Hardware-configurable 1.8V/3V/5V outputs with independent current limits (30/65/80mA) and overload detection at ~120mA |
| Autonomous activation sequencer | Internal state machine executes full ISO 7816 power-up sequence (VCC ramp, CLK enable, RST assert) within 220μs - no host timing constraints |
| Dual-presence detection with debounce | Simultaneous active-high and active-low PRES inputs with 8ms typ hardware debounce - eliminates false triggers from mechanical switch bounce |
| Integrated ESD protection | 8kV minimum IEC 61000-4-2 protection on all card-facing pins (I/O, CLK, RST, VCC, AUX1/AUX2) - removes need for external diodes |
| Ultra-low-power stop mode | Sub-10nA quiescent current achieved by disabling all analog blocks while preserving PRES monitoring - ideal for battery-backed POS terminals |
Applications
| Banking Payment Terminals | Access Control Readers |
|---|---|
Use Scenario: EMV-compliant debit/credit card transactions in countertop or portable point-of-sale devices. IC Role / Device Role / Timing Role: Smart card analog front-end managing power sequencing, level shifting, and fault-safe deactivation per ISO 7816-3 and EMV Level 1 requirements. Use Value: Eliminates host MCU firmware complexity for card activation timing and voltage switching, reducing certification effort and improving transaction reliability. |
Use Scenario: Secure door entry systems using contact-based smart cards in commercial buildings or data centers. IC Role / Device Role / Timing Role: Provides isolated, ESD-hardened interface between microcontroller and card reader contacts (C1–C8), including dual-presence sensing for tamper-resilient operation. Use Value: Enables fast, glitch-free card detection and power management - critical for low-latency access response and long battery life in wireless readers. |
| ATM Card Interfaces | PIN Pad Modules |
Use Scenario: High-reliability card reading in automated teller machines operating 24/7 under varying environmental conditions. IC Role / Device Role / Timing Role: Delivers thermally protected, short-circuit resilient VCC generation and real-time fault reporting (via OFF pin) to prevent card damage during insertion/removal. Use Value: Reduces field failures from card hot-plug events and ensures continuous operation through integrated overtemperature shutdown at +150°C. |
Use Scenario: Compact, battery-powered PIN entry devices used in retail or mobile banking applications. IC Role / Device Role / Timing Role: Serves as ultra-low-power smart card interface with sub-10nA stop mode and hardware-managed activation - extends single-charge battery life to years. Use Value: Achieves >5-year battery life in standby while maintaining instant wake-on-card-insertion via PRES monitoring - no periodic polling required. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar smart card interface applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX3232ESE+ | RS-232 transceiver only - no smart card voltage generation, sequencing, or ESD protection | Requires external LDOs, sequencer logic, and protection circuitry to emulate DS8113-RNG+T&R functionality | Only suitable if full custom analog design is acceptable and cost-sensitive BOM allows added components |
| ST8024BTR | Single-supply 5V-only smart card interface - lacks 1.8V/3V support, stop-mode current >1μA, no dual-presence inputs | Restricted to legacy 5V card systems; cannot support modern low-voltage EMV cards or battery-powered designs | Consider only for retrofitting existing 5V-only terminals where voltage flexibility and ultra-low power are not required |
Compared with MAX3232ESE+ and ST8024BTR, the DS8113-RNG+T&R uniquely integrates triple-voltage regulation, autonomous ISO-compliant sequencing, and sub-10nA stop mode in a single 28-pin SOIC - reducing BOM count by ≥7 components and enabling next-generation low-power, multi-standard smart card readers.
Availability
DS8113-RNG+T&R is available at Aetrix Electronics and suitable for banking payment terminals, access control readers, and ATM card interfaces requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for DS8113-RNG+T&R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) is a semiconductor company specializing in high-performance analog, mixed-signal, and power management ICs for industrial, communications, and security applications.
The DS8113-RNG+T&R belongs to Maxim's secure transaction interface product line, engineered specifically for EMV-certifiable smart card readers demanding hardware-enforced safety, low power, and seamless ISO 7816 compliance.
FAQ
What voltage levels does the DS8113-RNG+T&R support for smart card operation?
The DS8113-RNG+T&R supports three smart card supply voltages: 5.0V ±5% (up to 80mA), 3.0V ±8% (up to 65mA), and 1.8V ±10% (up to 30mA). Selection is controlled by the 1_8V and 5V/3V pins per Table 3 in the DS8113-RNG+T&R datasheet, with 1_8V having priority over 5V/3V. This enables full compatibility with legacy and modern EMV cards.
How does the DS8113-RNG+T&R handle card insertion and removal detection?
The DS8113-RNG+T&R uses dual-presence inputs (PRES active-low and PRES active-high) with an integrated 8ms typical hardware debounce timer. When a card is inserted, the OFF pin asserts high after debounce; upon removal, it drives low and triggers automatic emergency deactivation. This eliminates software debouncing and prevents false triggers from mechanical switch bounce in the DS8113-RNG+T&R.
What is the purpose of the CMDVCC pin on the DS8113-RNG+T&R?
The CMDVCC pin on the DS8113-RNG+T&R is an active-low control input that initiates the hardware-managed smart card activation or deactivation sequence. Pulling CMDVCC low starts full autonomous power-up (VCC ramp, CLK enable, RST assert); setting it high triggers safe deactivation. This offloads timing-critical ISO 7816 sequencing from the host MCU in the DS8113-RNG+T&R.
Does the DS8113-RNG+T&R include built-in ESD protection, and what level is specified?
Yes, the DS8113-RNG+T&R provides ≥8kV ESD protection on all card-facing pins (I/O, CLK, RST, VCC, AUX1, AUX2) per IEC 61000-4-2. This is implemented internally and eliminates the need for external TVS diodes in the DS8113-RNG+T&R design, simplifying layout and improving system-level ESD robustness for payment terminal deployments.
What is the lowest power state achievable with the DS8113-RNG+T&R, and how is it entered?
The DS8113-RNG+T&R achieves ultra-low-power stop mode with typical current consumption below 10nA. It is entered by holding CMDVCC, 5V/3V, and 1_8V pins high simultaneously while the card interface is inactive. In this state, all analog circuits disable except PRES monitoring, and the OFF pin mirrors PRES status - enabling multi-year battery life in the DS8113-RNG+T&R.
DS8113-RNG+T&R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 28-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Applications:
- Smart Card
- Interface:
- Analog
- Voltage - Supply:
- 2.7V ~ 6V
- Supplier Device Package:
- 28-SOIC
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
DS8113-RNG+T&R FAQ
1.How can I place an order for DS8113-RNG+T&R through Aetrix?
Please submit a Request for Quotation (RFQ) for DS8113-RNG+T&R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS8113-RNG+T&R reliable?
The price and inventory of DS8113-RNG+T&R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS8113-RNG+T&R is usually 5 days.
3.What payment methods are accepted for DS8113-RNG+T&R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS8113-RNG+T&R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS8113-RNG+T&R?
DS8113-RNG+T&R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS8113-RNG+T&R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS8113-RNG+T&R?
For technical support, including DS8113-RNG+T&R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS8113-RNG+T&R requirements.
6.How does Aetrix verify that DS8113-RNG+T&R is sourced from the original manufacturer or authorized distributors?
All DS8113-RNG+T&R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS8113-RNG+T&R meets industry standards.
7.What is the process for return or replacement of DS8113-RNG+T&R?
All DS8113-RNG+T&R units undergo pre-shipment inspection (PSI). If there is an issue with DS8113-RNG+T&R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS8113-RNG+T&R part is unused and in its original packaging.
Return procedure for DS8113-RNG+T&R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DS8113-RNG+T&R Tags

-
NVT4857UKAZ
NXP Semiconductors
-
TCA8418RTWR
Texas Instruments
-
PCA9546APWR
Texas Instruments

-
MD0100N8-G
Microchip Technology

-
PCA9548APW,118
NXP Semiconductors

-
PCA9540BDP,118
NXP Semiconductors

-
PCA9548APWR
Texas Instruments

-
PCA9546APW,118
NXP Semiconductors

-
PTN3360DBS,518
NXP Semiconductors

-
PCA9546ABS,118
NXP Semiconductors

-
PCA9518PWR
Texas Instruments

-
PCA9545APW,118
NXP Semiconductors
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

