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Analog Devices Inc./Maxim Integrated DS87C520-MCL
- Part No.:
- DS87C520-MCL
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Microcontrollers
- Package:
- 40-DIP (0.600", 15.24mm)
- Datasheet:
-
DS87C520-MCL.pdf
- Description:
- IC MCU 8BIT 16KB OTP 40DIP
- Quantity:
- Payment:
- Shipping:
Inventory:4,677
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Product details
Overview
DS87C520-MCL from Maxim Integrated is an 8051-compatible high-speed microcontroller with 16kB on-chip EPROM, 1kB MOVX-accessible SRAM, and 256 bytes of scratchpad RAM. It executes instructions in 4 clocks/machine cycle (vs. 12 for standard 8051), achieves 33MHz max clock rate, and supports dual hardware serial ports - used in industrial control systems requiring deterministic real-time firmware execution and legacy 8051 code migration.
For engineers reviewing the DS87C520-MCL datasheet, DS87C520-MCL pinout, DS87C520-MCL application, or DS87C520-MCL equivalent, key selection considerations include its 40-pin PDIP package, ROMSIZE register programmability, Power Management Mode (PMM) for dynamic clock scaling, EMI reduction via ALE disable, and compatibility with existing 8051 toolchains and PCB footprints.
Technical Context
The DS87C520-MCL implements a redesigned 8051 core eliminating dummy memory cycles, delivering 2.5× average instruction throughput over standard 8051 at identical crystal frequency. Its architecture supports dual data pointers (DPTR0/DPTR1), variable MOVX stretch (2–9 machine cycles), and software-selectable ROM size (0–16kB) via RMS2–RMS0 bits in ROMSIZE SFR (C2h).
It integrates power-fail reset, early-warning power-fail interrupt, programmable watchdog timer, and Brownout Monitor - all managed through dedicated SFRs including PMR (C4h), WDCON (D8h), and STATUS (C5h). Timers default to 12-clock operation for backward timing compatibility but are individually configurable for 4-clock mode.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | 8051-compatible, 4-clock/machine cycle (vs. 12 in legacy 8051); enables 2.5× average speedup with same code and crystal. |
| Max Clock Frequency | 33MHz - yields peak instruction cycle of 121ns (8.25 MIPs) and apparent execution speed of ~82.5MHz. |
| On-Chip Memory | 16kB EPROM (0000h–3FFFh) + 1kB MOVX-accessible SRAM (0000h–03FFh) + 256B direct-addressable RAM. |
| ROMSIZE Control | Software-configurable via RMS2–RMS0 bits (C2h); selects effective internal ROM size from 0 to 16kB for external memory overlay. |
| Power Management Mode | Enables CPU clock division by 64 or 1024 via PMR.CD1/CD0 (C4h); reduces machine cycle rate to 187.5kHz or 11.7kHz at 12MHz crystal. |
| Serial Interfaces | Two full-duplex UARTs (SCON0/SCON1 at 98h/C0h); Port 1 pins P1.2/P1.3 and Port 3 pins P3.0/P3.1 serve as RXD1/TXD1 and RXD0/TXD0. |
| Interrupt Sources | 13 total: 6 external (INT0–INT5), 7 internal; includes power-fail, watchdog timeout, and timer/serial events - prioritized via IP (B8h) and IE (A8h). |
Pinout & Package
DS87C520-MCL is housed in a 40-pin plastic DIP (dual in-line package) with 0.6-inch width, compatible with standard 8051 sockets and wave-soldering processes. Pin functions follow industry-standard 8051 mapping with enhancements for dual UART, extended interrupts, and power management control.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC (Pin 40) | Positive supply | +5V main power rail; decoupling required near pin for stable core and I/O operation. |
| GND (Pin 20) | Digital ground | Reference return path for all digital logic; must be low-impedance and separated from analog grounds if co-located. |
| RST (Pin 9) | Reset input | Schmitt-triggered active-high input with internal pulldown; no external RC needed - internal power-on reset suffices. |
| XTAL1/XTAL2 (Pins 18,19) | Clock oscillator interface | Supports parallel-resonant AT-cut crystals up to 33MHz; XTAL1 accepts external clock source if crystal omitted. |
| P0.0–P0.7 (Pins 39–32) | Multiplexed address/data bus | Open-drain I/O; provides AD0–AD7 during ALE pulse for external memory access; requires pullups when used as GPIO. |
| P1.0–P1.7 (Pins 1–8) | General-purpose I/O + peripherals | Includes T2/T2EX, RXD1/TXD1, and INT2–INT5 - enables dual serial comms and expanded interrupt handling without glue logic. |
| P2.0–P2.7 (Pins 21–28) | Upper address bus / I/O | Provides A8–A15 during external memory access; bidirectional with weak pullup; retains functionality as GPIO when not addressing. |
| P3.0–P3.7 (Pins 10–17) | Secondary function I/O | Hosts RXD0/TXD0, INT0/INT1, T0/T1, WR/RD - essential for standard 8051 peripheral interfacing and memory control. |
| EA (Pin 31) | External access select | Low = force external program fetch; High = enable internal EPROM; overrides ROMSIZE register setting. |
| ALE (Pin 30) | Address latch enable | Drives external latch (e.g., 74LS373); programmably disabled via PMR.ALEOFF (C4h.2) to reduce EMI. |
| PSEN (Pin 29) | Program store enable | Active-low chip enable for external ROM; pulses only during external opcode fetches; high otherwise. |
Key Features
| Feature | Design Value |
|---|---|
| Dual Data Pointers (DPTR0/DPTR1) | Eliminates sequential pointer reloads during block memory moves - cuts MOVX loop overhead by up to 50% in data-intensive firmware. |
| Variable MOVX Stretch (CKCON.2–0) | Configures external memory access timing from 2 to 9 machine cycles - enables direct interface to slow peripherals (LCDs, UARTs) without external wait-state logic. |
| ROMSIZE Register (C2h) | Software-selectable internal ROM boundary (0–16kB) - allows boot-from-external-Flash while retaining internal EPROM for critical routines. |
| Power Management Mode (PMR.CD1/CD0) | Reduces CPU clock rate by factor of 64 or 1024 - extends battery life in portable instrumentation without firmware rewrite. |
| EMI Reduction (PMR.ALEOFF) | Disables ALE output during idle periods - lowers radiated emissions by >10dB in noise-sensitive medical or automotive subsystems. |
Applications
| Industrial PLC I/O Module | Legacy Equipment Retrofit Controller |
|---|---|
Use Scenario: Real-time monitoring and actuation of sensors/valves in factory automation cabinets using RS-485 networks. IC Role / Device Role / Timing Role: Primary controller executing deterministic ladder logic with dual UARTs handling Modbus RTU master/slave communication. Use Value: 2.5× faster instruction execution ensures sub-millisecond scan times; ROMSIZE enables field-upgradable firmware via external Flash while preserving secure boot code in internal EPROM. | Use Scenario: Replacing obsolete 8051-based controllers in medical analyzers without PCB redesign. IC Role / Device Role / Timing Role: Drop-in replacement maintaining pinout, instruction set, and timing-critical ISR latency for analog signal sampling and display refresh. Use Value: Backward compatibility eliminates layout changes; Power Management Mode extends runtime in battery-backed diagnostic modes without modifying existing power sequencing. |
| Smart Energy Meter Communication Hub | Embedded Test Instrument Firmware Engine |
Use Scenario: Aggregating data from multiple metering ICs and transmitting via GPRS/LTE modules using AT command sets. IC Role / Device Role / Timing Role: Dual UART handles simultaneous communication with metrology ASIC (UART0) and cellular modem (UART1) with hardware flow control. Use Value: Independent baud rate generators per UART allow concurrent 9600bps metrology sync and 115200bps modem comms; MOVX stretch accommodates slow SPI-to-UART bridge ICs. | Use Scenario: Controlling precision DACs, ADCs, and relay matrices in automated test equipment with tight timing constraints. IC Role / Device Role / Timing Role: Timing-critical waveform generation and response capture using Timer 2 capture mode and INT4/INT5 edge-triggered interrupts. Use Value: 121ns instruction cycle enables 8.25MIPS throughput for real-time FFT preprocessing; Brownout Monitor prevents corrupted calibration data during line dips. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 8051-compatible microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS83C520-MCL | Factory mask ROM version (not EPROM); identical pinout, speed, and SFRs except EPROM programming capability. | Suitable for high-volume production where firmware is fixed and cost-sensitive; no in-system reprogramming support. | Select DS83C520-MCL for cost-optimized, unchangeable firmware deployments; DS87C520-MCL preferred for development, prototyping, or field-upgradable systems. |
| AT89C52-24PU | Standard 8051 core (12-clock/machine cycle); 8kB Flash, 256B RAM; no dual UART, ROMSIZE, or PMM features. | Limited to basic control tasks without advanced power management or memory overlay requirements. | Choose AT89C52-24PU only when legacy timing compliance is mandatory and enhanced peripherals are unnecessary; lacks DS87C520-MCL's speed, flexibility, and integration. |
Compared with DS83C520-MCL, DS87C520-MCL adds field-programmable EPROM for iterative firmware updates; versus AT89C52-24PU, it delivers 2.5× performance, dual serial ports, and dynamic memory mapping - making it superior for complex, upgradeable embedded systems requiring both legacy compatibility and modern feature depth.
Availability
DS87C520-MCL is available at Aetrix Electronics and suitable for industrial control systems, legacy equipment retrofits, smart energy metering, and embedded test instrumentation requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for DS87C520-MCL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and high-reliability microcontrollers for demanding industrial, medical, and communications applications.
The DS87C520-MCL belongs to Maxim's high-speed 8051-compatible microcontroller family, engineered to accelerate legacy code execution while adding dual serial interfaces, flexible memory mapping, and power-aware operation for resource-constrained embedded systems.
FAQ
What is the maximum operating frequency of the DS87C520-MCL?
The DS87C520-MCL supports a maximum crystal frequency of 33MHz. At this rate, its 4-clock-per-machine-cycle architecture achieves a peak instruction execution time of 121ns and an effective throughput of approximately 8.25 million instructions per second (MIPS). This is 2.5× faster than a standard 8051 running at the same crystal speed.
Does the DS87C520-MCL support in-system programming of its on-chip EPROM?
No, the DS87C520-MCL uses one-time-programmable (OTP) EPROM that must be programmed prior to soldering using a dedicated EPROM programmer. It does not support in-system or in-application reprogramming. For field-upgradable firmware, external Flash memory accessed via MOVX is typically used in conjunction with the ROMSIZE register.
How does the ROMSIZE feature work in the DS87C520-MCL?
The DS87C520-MCL's ROMSIZE register (SFR address C2h) allows software to dynamically configure the upper boundary of internal EPROM visibility - from 0kB to 16kB in steps (e.g., 4kB at 0FFFh, 8kB at 1FFFh). This enables seamless overlay of external Flash memory into the program address space while retaining secure boot code in internal EPROM.
Can the DS87C520-MCL operate with a 3.3V supply?
No, the DS87C520-MCL is a +5V-only device. Its VCC pin (Pin 40) requires a nominal 5.0V ±10% supply, and all I/O pins are TTL/CMOS 5V-compatible. Interfacing with 3.3V peripherals requires level-shifting circuitry; it is not 3.3V tolerant.
What is the purpose of the dual data pointers in the DS87C520-MCL?
The DS87C520-MCL provides two independent 16-bit data pointers (DPTR0 at 82h/83h and DPTR1 at 84h/85h), selected via DPS bit (86h.0). This eliminates the need to save/restore DPTR in memory during block data transfers - reducing MOVX loop overhead by up to 50% and accelerating firmware operations like buffer copying and table lookups.
DS87C520-MCL Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Package/Case:
- 40-DIP (0.600", 15.24mm)
- Series:
- 87C
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- 8051
- Core Size:
- 8-Bit
- Speed:
- 33MHz
- Connectivity:
- EBI/EMI, SIO, UART/USART
- Peripherals:
- Power-Fail Reset, WDT
- Number of I/O:
- 32
- Program Memory Size:
- 16KB (16K x 8)
- Program Memory Type:
- OTP
- EEPROM Size:
- -
- RAM Size:
- 1K x 8
- Voltage - Supply (Vcc/Vdd):
- 4.5V ~ 5.5V
- Data Converters:
- -
- Oscillator Type:
- External
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
DS87C520-MCL FAQ
1.How can I place an order for DS87C520-MCL through Aetrix?
Please submit a Request for Quotation (RFQ) for DS87C520-MCL on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS87C520-MCL reliable?
The price and inventory of DS87C520-MCL are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS87C520-MCL is usually 5 days.
3.What payment methods are accepted for DS87C520-MCL?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS87C520-MCL transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS87C520-MCL?
DS87C520-MCL orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS87C520-MCL order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS87C520-MCL?
For technical support, including DS87C520-MCL datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS87C520-MCL requirements.
6.How does Aetrix verify that DS87C520-MCL is sourced from the original manufacturer or authorized distributors?
All DS87C520-MCL products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS87C520-MCL meets industry standards.
7.What is the process for return or replacement of DS87C520-MCL?
All DS87C520-MCL units undergo pre-shipment inspection (PSI). If there is an issue with DS87C520-MCL, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS87C520-MCL part is unused and in its original packaging.
Return procedure for DS87C520-MCL:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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