Analog Devices Inc./Maxim Integrated DS87C520-QCL
- Part No.:
- DS87C520-QCL
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Microcontrollers
- Package:
- 44-LCC (J-Lead)
- Datasheet:
-
DS87C520-QCL.pdf
- Description:
- IC MCU 8BIT 16KB OTP 44PLCC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
DS87C520-QCL from Maxim Integrated is a high-speed, 8051-compatible microcontroller with 16kB on-chip EPROM, 1kB MOVX-accessible SRAM, and 256 bytes of scratchpad RAM. It executes instructions in 4 clocks/machine cycle (vs. 12 in standard 8051), supports up to 33MHz crystal, and features dual hardware serial ports - used in industrial control systems requiring deterministic real-time firmware execution and legacy 8051 code migration.
For engineers reviewing the DS87C520-QCL datasheet, DS87C520-QCL pinout, DS87C520-QCL application, or DS87C520-QCL equivalent, key selection considerations include its 44-pin PLCC package, ROMSIZE register for dynamic internal/external memory mapping, Power Management Mode (PMM) for low-power operation, EMI reduction via ALE disable, and compatibility with existing 8051 toolchains and PCB footprints.
Technical Context
The DS87C520-QCL implements a redesigned 8051 core eliminating dummy memory cycles, achieving 2.5× average instruction throughput over standard 8051 at identical clock frequency. Its architecture supports four-clock-per-machine-cycle execution while retaining full 8051 instruction set compatibility and default 12-clock timer operation for backward timing alignment.
It integrates dual data pointers (DPTR0/DPTR1) for accelerated block memory moves, programmable MOVX stretch (2–9 machine cycles), and ROMSIZE register (C2h) enabling software-selectable internal ROM size (0–16kB) to overlay external Flash during boot. All SFRs maintain 8051 address mapping with new bits added in reserved bit positions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | 8051-compatible, 4-clock/machine cycle, DC to 33MHz operation |
| On-Chip Memory | 16kB EPROM (0000h–3FFFh), 1kB MOVX SRAM (0000h–03FFh), 256B direct RAM |
| Execution Speed | Single-cycle instruction in 121ns at 33MHz (8.25 MIPS peak) |
| Serial Interfaces | Two full-duplex UARTs (Serial Port 0 and Serial Port 1) |
| Timer/Counter Resources | Three 16-bit timers/counters; Timer 2 accessible via P1.0/P1.1 |
| Interrupt System | 13 interrupt sources including six external (INT0–INT5), with priority control |
| Power Management | Programmable clock divider (×64 or ×1024) for reduced CPU speed and power consumption |
Pinout & Package
DS87C520-QCL is housed in a 44-pin Plastic Leaded Chip Carrier (PLCC) package with J-lead configuration, rated for 0°C to +70°C ambient operation and RoHS-compliant (QCL+ variant).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC (Pin 44) | Positive supply | +5V main power rail; decoupling required near pin |
| GND (Pins 1, 22, 23) | Digital ground | Common reference for all digital I/O and internal logic |
| RST (Pin 10) | Reset input | Schmitt-triggered active-high input; internal pulldown eliminates need for external RC network |
| XTAL1/XTAL2 (Pins 21, 22) | Clock oscillator interface | Supports parallel-resonant AT-cut crystals or external clock source; XTAL1 accepts external clock |
| P0.0–P0.7 (Pins 39–32) | Multiplexed address/data bus | Open-drain bidirectional port; provides AD0–AD7 during ALE pulse, requires pullups for I/O use |
| P1.0–P1.7 (Pins 2–9) | General-purpose I/O with alternate functions | Includes T2/T2EX, RXD1/TXD1, and INT2–INT5; weak pullup on reset, strong pulldown on write-0 |
| P2.0–P2.7 (Pins 24–31) | High-order address bus / I/O | Provides A8–A15 during external memory access; bidirectional with weak pullup on reset |
| P3.0–P3.7 (Pins 11–19) | Multiplexed I/O with system functions | Includes RXD0/TXD0, INT0/INT1, T0/T1, WR/RD strobes; same behavior as standard 8051 P3 |
| EA (Pin 35) | External access control | Active-low signal selecting internal ROM (EA=VCC) or external program memory (EA=GND) |
| ALE (Pin 33) | Address latch enable | Drives external latch (e.g., 74LS373); programmably disabled via PMR.2 to reduce EMI |
| PSEN (Pin 32) | Program store enable | Active-low output enabling external ROM during opcode fetch; synchronized to ALE |
| N.C. (Pins 12, 34) | No-connect | Reserved for future family expansion; must remain unconnected |
Key Features
| Feature | Design Value |
|---|---|
| ROMSIZE Register (C2h) | Software-selectable internal ROM size (0–16kB) enables seamless boot from external Flash without hardware changes |
| Dual Data Pointers (DPTR0/DPTR1) | Eliminates redundant pointer reloads in memory copy routines, reducing block move latency by up to 40% vs. single-DPTR 8051 |
| MOVX Stretch Control (CKCON.2–0) | Configurable 2–9 machine cycle timing for off-chip data accesses, supporting mixed-speed peripherals (e.g., fast RAM + slow LCD controller) |
| Power Management Mode (PMM) | Reduces CPU machine cycle rate to 1/64 or 1/1024 of crystal frequency, cutting active power by >90% in portable applications |
| EMI Reduction via ALE Disable | Software-controlled ALEOFF bit (PMR.2) halts ALE toggling during non-memory operations, lowering radiated emissions without affecting functionality |
Applications
| Industrial PLC Controller | Legacy Medical Device Upgrade |
|---|---|
Use Scenario: Real-time I/O scanning and ladder logic execution in DIN-rail mounted programmable logic controllers. IC Role / Device Role / Timing Role: Primary MCU executing deterministic control loops with sub-millisecond jitter tolerance using internal timers and dual UARTs for Modbus RTU communication. Use Value: 2.5× faster instruction execution allows doubling scan rate or adding diagnostics without changing clock or PCB layout. | Use Scenario: Retrofitting aging patient monitors with enhanced data logging and wireless telemetry while preserving legacy sensor interfaces. IC Role / Device Role / Timing Role: Host controller managing analog front-end ADCs, EEPROM storage, and Bluetooth LE UART bridge via Serial Port 1. Use Value: 1kB on-chip MOVX SRAM replaces external RAM, reducing BOM count and board area; ROMSIZE enables secure boot from encrypted external Flash. |
| Secure Bootloader Module | Low-Power Remote Terminal Unit |
Use Scenario: Field-upgradable firmware loader for embedded gateways requiring cryptographic signature verification before application launch. IC Role / Device Role / Timing Role: Secure bootloader executing from internal EPROM, validating signed firmware images in external SPI Flash using ROMSIZE-adjusted memory map. Use Value: Dynamic ROMSIZE control isolates boot code from application space, preventing accidental overwrite and enabling dual-bank updates. | Use Scenario: Battery-powered environmental sensor node transmitting data hourly via LoRaWAN, spending >99% time in sleep mode. IC Role / Device Role / Timing Role: Main controller entering Power Management Mode between transmissions, waking on RTC interrupt or external event. Use Value: PMM reduces average current draw to <100µA during sleep, extending 2xAA battery life beyond 5 years. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 8051-compatible microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS83C520-QCL | Factory mask ROM version (no EPROM reprogrammability); identical pinout, timing, and SFRs except EPROM-specific features | Better suited for high-volume production where firmware is fixed and cost sensitivity outweighs field-programmability | Select DS83C520-QCL when firmware is finalized and unit cost reduction is critical; DS87C520-QCL preferred for prototyping and firmware iteration. |
| AT89C52-24PI | Standard 8051 core (12-clock/machine cycle), 8kB Flash, no dual UART, no ROMSIZE, no PMM, 40-pin PDIP only | Limited to basic control tasks without advanced power management or memory flexibility; lacks PLCC packaging option | Choose AT89C52-24PI only for cost-constrained, low-complexity designs where 2.5× speed gain and dual serial ports are unnecessary. |
Compared with DS83C520-QCL, DS87C520-QCL offers field-reprogrammable EPROM for development agility; compared with AT89C52-24PI, it delivers higher throughput, flexible memory mapping, and low-power modes essential for modern embedded upgrades.
Availability
DS87C520-QCL is available at Aetrix Electronics and suitable for industrial automation, medical device retrofits, secure bootloader modules, and low-power remote terminal units requiring stable component supply across multi-year production cycles.
Supply support for DS87C520-QCL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) is a semiconductor company specializing in precision analog, mixed-signal, and high-reliability microcontrollers for industrial, medical, and communications applications.
The DS87C520-QCL belongs to Maxim's high-speed 8051-compatible microcontroller family, designed specifically to accelerate legacy 8051-based system upgrades while maintaining full software and hardware compatibility.
FAQ
What is the maximum operating frequency of the DS87C520-QCL?
The DS87C520-QCL supports a maximum crystal frequency of 33MHz, enabling a peak instruction execution rate of 8.25 MIPS. At this clock speed, single-cycle instructions complete in 121ns. The device operates across the full 0°C to +70°C temperature range specified for the QCL grade, with timing parameters guaranteed per the official Maxim datasheet revision 022207.
Does the DS87C520-QCL support in-system programming (ISP)?
No, the DS87C520-QCL does not support in-system programming. It contains UV-erasable EPROM memory requiring exposure to ultraviolet light for erasure and a dedicated EPROM programmer for reprogramming. Unlike Flash-based microcontrollers, it cannot be reprogrammed while soldered on a PCB. For field-updatable alternatives, consider DS83C520-QCL with mask ROM or newer Analog Devices microcontrollers with Flash.
How does the ROMSIZE feature work in the DS87C520-QCL?
The ROMSIZE feature in the DS87C520-QCL is controlled by bits RMS2–RMS0 in SFR C2h and allows dynamic selection of internal ROM size from 0kB to 16kB. This remaps the upper boundary of on-chip program memory, enabling external Flash to occupy addresses previously reserved for internal ROM - critical for secure bootloaders. Changing ROMSIZE requires timed-access writes and must be done from memory regions unaffected by the new mapping to prevent execution faults.
Can the DS87C520-QCL replace a standard 8051 in an existing design without modifications?
The DS87C520-QCL is pin-compatible and instruction-set compatible with standard 8051 devices in 44-pin PLCC packages, allowing socket replacement in many cases. However, due to its 4-clock/machine-cycle architecture, timing-critical code (e.g., bit-banged protocols, precise delay loops) may require adjustment. Timers default to 12-clock mode for compatibility, but software must verify real-time behavior and update delay constants accordingly.
What power-saving modes does the DS87C520-QCL offer?
The DS87C520-QCL implements Power Management Mode (PMM), allowing software to configure the CPU clock divider to ×64 or ×1024 via PMR register bits CD1/CD0. This reduces the machine cycle rate - e.g., from 8.25MHz to 187.5kHz or 11.7kHz at 33MHz crystal - cutting dynamic power proportionally. PMM supports automatic hardware/software exit and is ideal for battery-operated applications where responsiveness can be traded for energy efficiency.
DS87C520-QCL Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Package/Case:
- 44-LCC (J-Lead)
- Series:
- 87C
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Verified
- Core Processor:
- 8051
- Core Size:
- 8-Bit
- Speed:
- 33MHz
- Connectivity:
- EBI/EMI, SIO, UART/USART
- Peripherals:
- Power-Fail Reset, WDT
- Number of I/O:
- 32
- Program Memory Size:
- 16KB (16K x 8)
- Program Memory Type:
- OTP
- EEPROM Size:
- -
- RAM Size:
- 1K x 8
- Voltage - Supply (Vcc/Vdd):
- 4.5V ~ 5.5V
- Data Converters:
- -
- Oscillator Type:
- External
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
DS87C520-QCL FAQ
1.How can I place an order for DS87C520-QCL through Aetrix?
Please submit a Request for Quotation (RFQ) for DS87C520-QCL on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS87C520-QCL reliable?
The price and inventory of DS87C520-QCL are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS87C520-QCL is usually 5 days.
3.What payment methods are accepted for DS87C520-QCL?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS87C520-QCL transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS87C520-QCL?
DS87C520-QCL orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS87C520-QCL order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS87C520-QCL?
For technical support, including DS87C520-QCL datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS87C520-QCL requirements.
6.How does Aetrix verify that DS87C520-QCL is sourced from the original manufacturer or authorized distributors?
All DS87C520-QCL products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS87C520-QCL meets industry standards.
7.What is the process for return or replacement of DS87C520-QCL?
All DS87C520-QCL units undergo pre-shipment inspection (PSI). If there is an issue with DS87C520-QCL, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS87C520-QCL part is unused and in its original packaging.
Return procedure for DS87C520-QCL:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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