Analog Devices Inc./Maxim Integrated DS87C520-QCL+T&R
- Part No.:
- DS87C520-QCL+T&R
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Microcontrollers
- Package:
- 44-LCC (J-Lead)
- Datasheet:
-
DS87C520-QCL+T&R.pdf
- Description:
- IC MCU 8BIT 16KB OTP 44PLCC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
DS87C520-QCL+T&R from Maxim Integrated (now Analog Devices) is a high-speed, 8051-compatible microcontroller with 16kB on-chip EPROM, 1kB MOVX-accessible SRAM, and 256 bytes of scratchpad RAM. It executes instructions in 4 clocks/machine cycle (vs. 12 in standard 8051), achieving 33MHz max clock rate and 121ns single-cycle instruction time. It serves as a drop-in performance upgrade for legacy 8051-based industrial control, instrumentation, and embedded communication systems.
For engineers reviewing the DS87C520-QCL+T&R datasheet, DS87C520-QCL+T&R pinout, DS87C520-QCL+T&R application, or DS87C520-QCL+T&R equivalent, key selection considerations include its dual hardware serial ports, ROMSIZE register for dynamic external memory mapping, Power Management Mode for low-power operation, and PLCC-44 package compatibility with existing 8051 sockets.
Technical Context
The DS87C520-QCL+T&R implements a redesigned 8051 core eliminating dummy memory cycles, delivering 2.5× average speed improvement over standard 8051 at identical crystal frequency. Its architecture supports four-clock-per-machine-cycle execution while maintaining full 8051 instruction set and SFR compatibility - including extended registers like DPS (Dual Data Pointer Select) and PMR (Power Management Register).
It integrates two full-duplex UARTs, three 16-bit timer/counters (with optional 4-clock timing), programmable watchdog timer, power-fail reset, and early-warning interrupt. Memory access is enhanced via dual DPTRs and configurable MOVX stretch (2–9 machine cycles), enabling seamless interfacing with both fast SRAM and slow peripherals without glue logic.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | 8051-compatible, 4-clock-per-machine-cycle execution (vs. 12 in legacy 8051) |
| Max Clock Frequency | 33MHz - enables 82.5MHz apparent instruction throughput (2.5× speedup) |
| On-Chip Memory | 16kB EPROM (program memory) + 1kB MOVX-accessible SRAM + 256B direct RAM |
| Serial Interfaces | Two independent full-duplex UARTs (UART0 on P3.0/P3.1; UART1 on P1.2/P1.3) |
| Timer/Counters | Three 16-bit timers/counters; individually configurable for 4- or 12-clock operation |
| Power Management | Software-selectable clock division (×64 or ×1024) reduces CPU speed to 187.5kHz or 11.7kHz at 12MHz crystal |
| EMI Reduction | Software-controllable ALE disable (via PMR.2) eliminates address latch pulse when unused |
Pinout & Package
DS87C520-QCL+T&R is supplied in a 44-pin Plastic Leaded Chip Carrier (PLCC) package with J-lead configuration, RoHS-compliant and lead(Pb)-free. Pinout matches standard 8051 family layout for drop-in replacement in PLCC-44 sockets.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC (Pin 44) | Positive Supply | +5V main power rail; decoupling required near pin for noise suppression |
| GND (Pins 1, 22, 23) | Digital Ground | Common reference for all digital I/O and internal logic; multiple pins reduce ground impedance |
| RST (Pin 10) | Reset Input | Schmitt-triggered active-high input; internal pulldown eliminates need for external RC network |
| XTAL1/XTAL2 (Pins 20, 21) | Crystal Oscillator | Supports parallel-resonant AT-cut crystals up to 33MHz; XTAL1 accepts external clock source |
| P0.0–P0.7 (Pins 39–32) | Multiplexed Address/Data Bus | Open-drain port used for AD0–AD7 during external memory access; requires pullups for I/O use |
| P1.0–P1.7 (Pins 2–9) | General-Purpose I/O | Includes alternate functions: T2/T2EX, UART1 (RXD1/TXD1), and INT2–INT5 (6 external interrupts) |
| P2.0–P2.7 (Pins 24–31) | Upper Address Bus / I/O | Provides A8–A15 during external memory access; bidirectional with weak pullup in reset state |
| P3.0–P3.7 (Pins 11–19) | Multiplexed I/O / Peripherals | Standard 8051 alternate functions: UART0, INT0/INT1, T0/T1, RD/WR strobes |
| EA (Pin 35) | External Access Control | Active-low signal selects internal (EA=VCC) or external (EA=GND) program memory source |
| ALE (Pin 33) | Address Latch Enable | Drives external latch (e.g., 74LS373); software-disablable via PMR.2 to reduce EMI |
| PSEN (Pin 32) | Program Store Enable | Active-low chip enable for external ROM; pulses only during external code fetches |
Key Features
| Feature | Design Value |
|---|---|
| ROMSIZE Register (C2h) | Software-configurable on-chip ROM size (0–16kB) enables dynamic external flash boot block mapping |
| Dual Data Pointers (DPTR0/DPTR1) | Eliminates redundant pointer reloads in block memory moves - cuts MOVX loop overhead by ~50% |
| MOVX Stretch Control (CKCON.2–0) | Adjusts external data memory access from 2 to 9 machine cycles - supports mixed-speed peripherals without hardware changes |
| Power Management Mode (PMM) | Reduces CPU clock rate to 1/64 or 1/1024 of crystal frequency - extends battery life in portable designs |
| Early-Warning Power-Fail Interrupt | Generates interrupt before brownout threshold - allows safe data save or controlled shutdown sequence |
Applications
| Industrial PLC Controller | Smart Energy Meter |
|---|---|
Use Scenario: Real-time I/O scanning, protocol translation (Modbus RTU/ASCII), and local HMI control in DIN-rail mounted controllers. IC Role / Device Role / Timing Role: Primary system controller executing deterministic scan loops with sub-millisecond jitter; UART1 handles fieldbus comms while UART0 manages display interface. Use Value: 33MHz operation ensures >10k I/O points scanned per second; ROMSIZE enables secure firmware updates via external SPI flash mapped into program space. |
Use Scenario: Accurate energy measurement, tamper detection, and two-way communication (PLC or RF) in residential/utility smart meters. IC Role / Device Role / Timing Role: Host MCU coordinating metrology IC (e.g., ADE7878) via SPI, managing EEPROM logging, and driving optical/RF PHY layers. Use Value: Early-warning power-fail interrupt triggers immediate EEPROM commit before supply collapse; dual UARTs support simultaneous DLMS/COSEM and local debug interfaces. |
| Medical Diagnostic Device | Legacy System Emulator |
Use Scenario: Portable ultrasound front-end control, sensor calibration, and image buffer management in battery-powered diagnostic tools. IC Role / Device Role / Timing Role: Real-time waveform acquisition controller with precise timing for ADC triggering and DMA-like data movement using dual DPTRs. Use Value: 4-clock execution reduces latency in closed-loop feedback paths; PMM extends runtime during standby between scans without sacrificing wake-up responsiveness. |
Use Scenario: Hardware replacement for obsolete 8051-based test equipment, avionics LRUs, or telecom line cards requiring zero PCB redesign. IC Role / Device Role / Timing Role: Pin- and instruction-set compatible drop-in upgrade preserving legacy firmware and socket footprint (PLCC-44). Use Value: 2.5× speedup improves throughput without code changes; ALE disable and MOVX stretch maintain timing compatibility with legacy peripheral timing budgets. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 8051-compatible microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS83C520-QCL+T&R | Factory mask ROM version (16kB fixed); no EPROM programming capability; identical pinout, speed, and peripherals | Targeted for high-volume, cost-sensitive production where firmware is finalized and unchangeable | Select when firmware is stable and reprogramming is unnecessary - lower unit cost than EPROM variant |
| AT89C51ED2-RLTUM | Enhanced 8051 core (6-clock), 64kB Flash, USB interface, but only one UART and no ROMSIZE register | Lacks dual UARTs and dynamic memory remapping; requires firmware adaptation for USB host/peripheral roles | Choose only if USB connectivity is mandatory and external memory mapping flexibility is not required |
Compared with DS87C520-QCL+T&R, DS83C520-QCL+T&R offers identical performance and packaging but eliminates field-programmability for cost reduction, while AT89C51ED2-RLTUM trades dual UARTs and ROMSIZE flexibility for integrated USB - making it unsuitable for legacy 8051 drop-in upgrades requiring those features.
Availability
DS87C520-QCL+T&R is available at Aetrix Electronics and suitable for industrial automation, smart metering, and medical diagnostics requiring stable component supply, long-term lifecycle support, and RoHS-compliant PLCC packaging.
Supply support for DS87C520-QCL+T&R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (acquired by Analog Devices in 2021) is a leader in precision analog, mixed-signal, and high-reliability semiconductor solutions for industrial, automotive, and communications markets.
The DS87C520-QCL+T&R belongs to Maxim's high-speed 8051 microcontroller family, designed specifically to extend the life of legacy 8051-based systems through performance uplift, enhanced memory management, and robust power/failure handling - without requiring architectural overhaul.
FAQ
What is the maximum operating frequency of the DS87C520-QCL+T&R?
The DS87C520-QCL+T&R supports a maximum crystal frequency of 33MHz, enabling a machine cycle rate of 8.25MHz (33MHz ÷ 4). At this speed, the fastest instruction executes in 121ns. This specification is guaranteed across the commercial temperature range (0°C to +70°C) and applies directly to the DS87C520-QCL+T&R in its 44-pin PLCC package.
Does the DS87C520-QCL+T&R support in-system programming (ISP)?
No, the DS87C520-QCL+T&R does not support in-system programming. It contains factory-programmed EPROM that requires UV erasure (via windowed CERDIP variants) or is one-time programmable (OTP) in plastic packages. The DS87C520-QCL+T&R uses OTP EPROM - once programmed, code cannot be rewritten electrically or in-circuit.
How does the ROMSIZE feature work in the DS87C520-QCL+T&R?
The ROMSIZE register (SFR C2h) in the DS87C520-QCL+T&R lets software dynamically configure the upper boundary of on-chip program memory - from 0kB to 16kB in steps (e.g., 4kB at 0FFFh). This enables external flash to occupy addresses normally reserved for internal ROM, supporting secure boot and firmware updates. The DS87C520-QCL+T&R defaults to 16kB after reset.
Can the DS87C520-QCL+T&R replace a standard 8051 in a PLCC-44 socket?
Yes, the DS87C520-QCL+T&R is pin-compatible with standard 8051 microcontrollers in the 44-pin PLCC package. Its pinout matches industry-standard 8051 layouts, including identical placement of VCC, GND, RST, XTAL1/2, P0–P3, and control signals. Firmware typically runs unchanged, though timing-critical code may require adjustment due to the 4-clock-per-cycle speedup.
What is the function of the dual data pointers in the DS87C520-QCL+T&R?
The DS87C520-QCL+T&R provides two independent 16-bit data pointers (DPTR0 at 82h/83h and DPTR1 at 84h/85h), selected via the DPS bit (PMR.7). This eliminates repeated DPTR reloads during block memory transfers - for example, moving data from external RAM to internal SRAM - reducing instruction count and execution time by up to 50% compared to single-DPTR 8051 implementations.
DS87C520-QCL+T&R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Package/Case:
- 44-LCC (J-Lead)
- Series:
- 87C
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Verified
- Core Processor:
- 8051
- Core Size:
- 8-Bit
- Speed:
- 33MHz
- Connectivity:
- EBI/EMI, SIO, UART/USART
- Peripherals:
- Power-Fail Reset, WDT
- Number of I/O:
- 32
- Program Memory Size:
- 16KB (16K x 8)
- Program Memory Type:
- OTP
- EEPROM Size:
- -
- RAM Size:
- 1K x 8
- Voltage - Supply (Vcc/Vdd):
- 4.5V ~ 5.5V
- Data Converters:
- -
- Oscillator Type:
- External
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
DS87C520-QCL+T&R FAQ
1.How can I place an order for DS87C520-QCL+T&R through Aetrix?
Please submit a Request for Quotation (RFQ) for DS87C520-QCL+T&R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS87C520-QCL+T&R reliable?
The price and inventory of DS87C520-QCL+T&R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS87C520-QCL+T&R is usually 5 days.
3.What payment methods are accepted for DS87C520-QCL+T&R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS87C520-QCL+T&R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS87C520-QCL+T&R?
DS87C520-QCL+T&R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS87C520-QCL+T&R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS87C520-QCL+T&R?
For technical support, including DS87C520-QCL+T&R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS87C520-QCL+T&R requirements.
6.How does Aetrix verify that DS87C520-QCL+T&R is sourced from the original manufacturer or authorized distributors?
All DS87C520-QCL+T&R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS87C520-QCL+T&R meets industry standards.
7.What is the process for return or replacement of DS87C520-QCL+T&R?
All DS87C520-QCL+T&R units undergo pre-shipment inspection (PSI). If there is an issue with DS87C520-QCL+T&R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS87C520-QCL+T&R part is unused and in its original packaging.
Return procedure for DS87C520-QCL+T&R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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