Analog Devices Inc./Maxim Integrated DS87C520-WCL
- Part No.:
- DS87C520-WCL
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Microcontrollers
- Package:
- 40-CDIP (0.600", 15.24mm) Window
- Datasheet:
-
DS87C520-WCL.pdf
- Description:
- IC MCU 8B 16KB EPROM/UV 40CERDIP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
DS87C520-WCL from Maxim Integrated is a high-speed, 8051-compatible microcontroller in a 40-pin windowed CERDIP package, featuring a 4-clock-per-machine-cycle core, 16kB on-chip EPROM, 1kB MOVX-accessible SRAM, and dual hardware serial ports. It operates up to 33MHz with single-cycle instruction execution in 121ns and supports dynamic ROMSIZE configuration for boot-from-external-Flash applications.
For engineers reviewing the DS87C520-WCL datasheet, DS87C520-WCL pinout, DS87C520-WCL application, or DS87C520-WCL equivalent, key selection considerations include its 33MHz max clock, windowed CERDIP package for UV-erasable EPROM reprogramming, ROMSIZE register control for memory mapping flexibility, and dual DPTR support for accelerated block memory moves.
Technical Context
The DS87C520-WCL implements a redesigned 8051 core eliminating dummy memory cycles, achieving 2.5× average speedup over standard 8051 at identical crystal frequency. Its instruction timing differs from legacy 8051 - e.g., MOVX A,@DPTR executes in 2 machine cycles (8 clocks) vs. 24 clocks in original - while maintaining full 8051 instruction set compatibility and default 12-clock timer operation for backward timing alignment.
It integrates two full-duplex UARTs (Serial Port 0 on P3.0/P3.1, Serial Port 1 on P1.2/P1.3), programmable Power Management Mode (PMM) with 64×/1024× clock division, EMI-reduction ALE disable, and 13 interrupt sources including six external interrupts with configurable edge detection on P1.4–P1.7 and P3.2–P3.3.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | 8051-compatible, 4-clock-per-machine-cycle design enabling 2.5× average speedup vs. standard 8051 at same crystal frequency |
| Max Clock Frequency | 33MHz crystal input, yielding 82.5MHz apparent execution speed and 121ns single-cycle instruction time |
| On-Chip Memory | 16kB EPROM (UV-erasable via windowed CERDIP) + 1kB MOVX-accessible SRAM + 256B direct RAM |
| ROMSIZE Control | Software-configurable internal ROM size (0–16kB) via RMS2–RMS0 bits, enabling dynamic external Flash boot partitioning |
| Memory Interface | Dual data pointers (DPTR0/DPTR1) and stretchable MOVX timing (2–9 machine cycles) for flexible external memory/peripheral interfacing |
| Power Management | Programmable PMM with CPU clock division by 64 or 1024, reducing machine cycle rate to 187.5kHz or 11.7kHz at 12MHz crystal |
| Interrupt System | 13 sources including six external interrupts (INT0–INT5), with edge-selectable triggers on P1.4–P1.7 and P3.2–P3.3 |
Pinout & Package
DS87C520-WCL is housed in a 40-pin windowed ceramic DIP (CERDIP) package, compatible with standard 8051 sockets and supporting UV erasure of on-chip EPROM. Pin functions follow industry-standard 8051 assignment with enhancements for dual serial ports and expanded interrupt capability.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC (Pin 40) | Positive supply | +5V main power rail; decoupling required near pin for stable high-speed operation |
| GND (Pin 20) | Digital ground | Reference return path for all digital I/O and core logic; separate analog ground not required |
| RST (Pin 9) | Reset input | Schmitt-triggered active-high input with internal pulldown; no external RC needed due to internal power-on reset |
| XTAL1/XTAL2 (Pins 18,19) | Clock oscillator interface | Supports parallel-resonant AT-cut crystals up to 33MHz; XTAL1 accepts external clock source |
| P0.0–P0.7 (Pins 39–32) | Multiplexed address/data bus | Open-drain bidirectional port; provides AD0–AD7 during ALE pulse for external memory addressing |
| P1.0–P1.7 (Pins 1–8) | General-purpose I/O + peripherals | Includes T2/T2EX, RXD1/TXD1, and INT2–INT5 - enables second UART and five additional interrupts |
| P2.0–P2.7 (Pins 21–28) | High-order address bus | Provides A8–A15 for external memory expansion; retains I/O functionality when EA = VCC |
| P3.0–P3.7 (Pins 10–17) | Alternate function I/O | Hosts RXD0/TXD0, INT0/INT1, T0/T1, WR/RD - maintains full 8051 peripheral compatibility |
| EA (Pin 31) | External access control | Active-low signal selecting internal ROM (EA = VCC) or external program memory (EA = GND) |
| ALE (Pin 30) | Address latch enable | Drives external latch (e.g., 74LS373); software-controllable disable (PMR.2) for EMI reduction |
| PSEN (Pin 29) | Program store enable | Active-low chip enable for external ROM; pulses automatically during external code fetches |
Key Features
| Feature | Design Value |
|---|---|
| Dual Hardware UARTs | Full-duplex Serial Port 0 (P3.0/P3.1) and Serial Port 1 (P1.2/P1.3) enable simultaneous host/debug and peripheral communication without software emulation |
| ROMSIZE Register | Three-bit RMS2–RMS0 control dynamically masks internal ROM address space (0–16kB), allowing seamless boot-from-external-Flash without hardware changes |
| Dual Data Pointers | DPTR0 (82h/83h) and DPTR1 (84h/85h) with DPS bit selection eliminate redundant pointer reloads during block memory transfers, cutting MOVX loop overhead by ~50% |
| Stretchable MOVX Timing | CKCON.2–0 configures external data memory access from 2 to 9 machine cycles, enabling direct interface to slow peripherals (LCDs, UARTs) without glue logic |
| Power Management Mode | Software-selectable 64× or 1024× clock division reduces CPU throughput and dynamic power consumption proportionally - critical for battery-powered portable systems |
Applications
| Industrial PLC Controller | Medical Device Bootloader |
|---|---|
Use Scenario: Programmable logic controller executing real-time I/O scanning and ladder logic with deterministic response under 1ms. IC Role / Device Role / Timing Role: Primary system controller managing discrete I/O, analog acquisition, and Modbus RTU communication via dual UARTs. Use Value: 33MHz operation and 2.5× speedup ensure sub-millisecond scan cycles; ROMSIZE allows field-upgradable firmware stored in external Flash while retaining secure boot from internal EPROM. | Use Scenario: Embedded bootloader in diagnostic imaging equipment that verifies and loads application firmware from external SPI Flash before runtime execution. IC Role / Device Role / Timing Role: Secure boot manager using windowed CERDIP EPROM for immutable root-of-trust and ROMSIZE-controlled external memory mapping. Use Value: UV-erasable EPROM enables post-production firmware validation; ROMSIZE register permits dynamic switching between internal boot code and external application image without hardware modification. |
| Legacy System Accelerator | EMI-Sensitive Test Instrument |
Use Scenario: Drop-in replacement for aging 8051-based test equipment requiring higher throughput without PCB redesign. IC Role / Device Role / Timing Role: Pin- and instruction-set-compatible upgrade delivering 2.5× faster instruction execution while preserving existing timer-based timing intervals. Use Value: 40-pin CERDIP package fits original socket; default 12-clock timer mode maintains legacy timing behavior; dual DPTR accelerates data logging buffer management. | Use Scenario: Precision measurement instrument operating in regulated lab environments where radiated emissions must meet CISPR 22 Class B limits. IC Role / Device Role / Timing Role: Main controller implementing low-emission operation via ALE disable and controlled clock gating during idle periods. Use Value: Software-controllable ALEOFF (PMR.2) eliminates unnecessary high-frequency clock harmonics; PMM reduces dynamic power and associated broadband noise during standby. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS87C520-MCL | Identical core and peripherals, but in 40-pin plastic DIP; lacks UV-erasable window; RoHS-compliant lead-free option available (+ suffix) | No EPROM reprogramming capability; suited for production units where firmware is finalized and cost-sensitive | Select DS87C520-MCL+ for volume production with fixed firmware; retain DS87C520-WCL only for development, prototyping, or field-programmable deployments |
| DS83C520-MCL | Mask ROM version with identical pinout, speed, and feature set; 16kB factory-programmed ROM replaces EPROM; lower unit cost at high volumes | Unalterable firmware; requires mask revision for updates; no UV erasure or in-circuit programming support | Choose DS83C520-MCL for cost-driven, high-volume OEM applications with stable, validated firmware; DS87C520-WCL remains essential for iterative development |
Compared with DS87C520-MCL and DS83C520-MCL, the DS87C520-WCL uniquely supports UV-erasable EPROM reprogramming via its ceramic window, making it indispensable for firmware development, qualification testing, and field updates - whereas the alternatives trade programmability for cost or manufacturability.
Availability
DS87C520-WCL is available at Aetrix Electronics and suitable for industrial automation controllers, medical device bootloaders, legacy system upgrades, and EMI-sensitive instrumentation requiring stable component supply and long-term traceability.
Supply support for DS87C520-WCL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and high-reliability semiconductor solutions for industrial, medical, and communications markets.
The DS87C520-WCL belongs to Maxim's high-speed 8051-compatible microcontroller family, engineered to accelerate legacy 8051-based systems while preserving software and hardware compatibility - targeting cost-sensitive, performance-limited embedded applications needing field-upgradable firmware.
FAQ
What is the maximum operating frequency of the DS87C520-WCL?
The DS87C520-WCL supports a maximum crystal frequency of 33MHz, enabling an apparent execution speed of 82.5MHz (2.5× standard 8051) and single-cycle instructions completing in 121ns. This rating applies across its specified 0°C to +70°C temperature range and requires stable ±0.5% crystal tolerance and proper load capacitance per the datasheet layout guidelines.
How does the ROMSIZE feature work in the DS87C520-WCL?
The DS87C520-WCL uses the ROMSIZE register (SFR C2h, bits RMS2–RMS0) to dynamically configure the upper boundary of internal EPROM address decoding - selectable from 0kB to 16kB in powers of two. This allows the DS87C520-WCL to map external Flash into the 0000h–3FFFh space while keeping boot code in internal EPROM, enabling secure, field-upgradable firmware architectures without hardware changes.
Can the DS87C520-WCL be used as a drop-in replacement for standard 8051 microcontrollers?
Yes, the DS87C520-WCL is pin-compatible and instruction-set-compatible with standard 8051 devices in 40-pin DIP packages. Its default timer configuration runs at 12 clocks per increment to preserve legacy timing, and all I/O ports behave identically. However, DS87C520-WCL executes instructions 2.5× faster - so timing-critical software loops and baud rate generators may require recalibration unless using the built-in timer scaling.
What is the purpose of the windowed CERDIP package in the DS87C520-WCL?
The windowed ceramic DIP package in the DS87C520-WCL enables UV light erasure of its on-chip EPROM, allowing full firmware reprogramming after soldering. This makes the DS87C520-WCL ideal for development, prototyping, and low-volume field updates - unlike plastic DIP or mask ROM variants which lack erasability. The window must remain uncovered during UV exposure and protected from ambient light during normal operation.
Does the DS87C520-WCL support both internal and external data memory access simultaneously?
Yes, the DS87C520-WCL supports concurrent internal and external data memory access via the DME1/DME0 bits in PMR (C4h). When enabled, MOVX instructions to addresses 0000h–03FFh target the 1kB on-chip SRAM, while addresses above 03FFh route to external memory through Ports 0 and 2 - allowing hybrid memory architectures with zero wait-state internal storage and flexible external expansion.
DS87C520-WCL Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Package/Case:
- 40-CDIP (0.600", 15.24mm) Window
- Series:
- 87C
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- 8051
- Core Size:
- 8-Bit
- Speed:
- 33MHz
- Connectivity:
- EBI/EMI, SIO, UART/USART
- Peripherals:
- Power-Fail Reset, WDT
- Number of I/O:
- 32
- Program Memory Size:
- 16KB (16K x 8)
- Program Memory Type:
- EPROM, UV
- EEPROM Size:
- -
- RAM Size:
- 1K x 8
- Voltage - Supply (Vcc/Vdd):
- 4.5V ~ 5.5V
- Data Converters:
- -
- Oscillator Type:
- External
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
DS87C520-WCL FAQ
1.How can I place an order for DS87C520-WCL through Aetrix?
Please submit a Request for Quotation (RFQ) for DS87C520-WCL on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS87C520-WCL reliable?
The price and inventory of DS87C520-WCL are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS87C520-WCL is usually 5 days.
3.What payment methods are accepted for DS87C520-WCL?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS87C520-WCL transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS87C520-WCL?
DS87C520-WCL orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS87C520-WCL order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS87C520-WCL?
For technical support, including DS87C520-WCL datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS87C520-WCL requirements.
6.How does Aetrix verify that DS87C520-WCL is sourced from the original manufacturer or authorized distributors?
All DS87C520-WCL products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS87C520-WCL meets industry standards.
7.What is the process for return or replacement of DS87C520-WCL?
All DS87C520-WCL units undergo pre-shipment inspection (PSI). If there is an issue with DS87C520-WCL, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS87C520-WCL part is unused and in its original packaging.
Return procedure for DS87C520-WCL:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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