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Texas Instruments DS90C185SQE/NOPB
- Part No.:
- DS90C185SQE/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Serializers, Deserializers
- Package:
- 48-WFQFN Exposed Pad
- Datasheet:
-
DS90C185SQE/NOPB.pdf
- Description:
- IC SERIALIZER LVDS LP 48WQFN
- Quantity:
- Payment:
- Shipping:
Inventory:3,239
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Product details
Overview
DS90C185SQE/NOPB from Texas Instruments is a low-power 1.8V LVDS serializer for portable display interfaces, converting 28-bit LVCMOS video (24-bit RGB + 3 control + 1 GP) into FPD-Link 4D+C LVDS output. It supports SXGA+ (1400×1050@60Hz), operates at 25–105 MHz pixel clock, delivers 2.94 Gbps max throughput, and features sleep mode, spread-spectrum clock compatibility, and dual 18/24-bit RGB modes.
For engineers reviewing the DS90C185SQE/NOPB datasheet, DS90C185SQE/NOPB pinout, DS90C185SQE/NOPB application, or DS90C185SQE/NOPB equivalent, this page provides verified technical context, validated pin functions, confirmed power and timing specifications, and real-world display interface design guidance - all specific to the DS90C185SQE/NOPB WQFN-48 package with TI's production-grade electrical characteristics.
Technical Context
The DS90C185SQE/NOPB implements a parallel-to-LVDS serializer with integrated PLL, accepting 28-bit 1.8V LVCMOS inputs (RGB, HSync, VSync, DE, GP) and generating four differential LVDS data lanes plus one LVDS clock lane (4D+C). Its architecture supports two fixed operating modes: 24-bit RGB (4D+C) with all four TxOUT channels active, or 18-bit RGB (3D+C) with TxOUT3 tri-stated via 18B_MODE pin.
It uses a single 1.8V supply across VDD, VDDTX, and VDDPLL rails, incorporates programmable VOD selection (±180 mV or ±300 mV), edge-selectable latching (RFB pin), and hardware sleep control (PDB pin). The device achieves <50 mW typical power at 75 MHz while maintaining ANSI/TIA/EIA-644-A LVDS compliance and sub-110 ps channel-to-channel skew.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 1.71–1.89 V - Enables direct integration with 1.8V GPU I/O and low-noise power domains |
| Pixel Clock Range | 25–105 MHz - Supports resolutions from VGA up to SXGA+ (1400×1050@60Hz) |
| Max Throughput | 2.94 Gbps - Achieved at 105 MHz × 28 bits; enables full 24-bit color at high refresh rates |
| LVDS Output VOD | Selectable ±180 mV or ±300 mV - Balances EMI reduction vs. noise margin for trace/cable length |
| Power Dissipation | 31–45 mA typical (55–85 mW) - Measured at 75 MHz with PRBS-7 pattern and 1.8V supply |
| Sleep Current | 18–200 μA - Achieved when PDB = 0; shuts down PLL and LVDS drivers, pulling outputs to GND |
| Channel Skew | ≤110 ps - Ensures timing alignment across TxOUT[3:0] and TxCLKOUT for reliable deserialization |
Pinout & Package
DS90C185SQE/NOPB is housed in a 6 mm × 6 mm × 0.8 mm, 48-pin WQFN (NJV) package with exposed thermal pad (DAP = GND). Pin pitch is 0.4 mm. Package complies with JEDEC MO-220, RoHS-compliant, MSL Level-1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| D0–D27 | LVCMOS Data Input | 28-bit parallel bus: R7–R0, G7–G0, B7–B0, HSync, VSync, DE, GP - all 1.8V tolerant with internal pull-downs |
| CLK | LVCMOS Pixel Clock Input | 25–105 MHz clock; latching edge selected by RFB (rising/falling); includes internal pull-down |
| TxOUT0± to TxOUT3± | LVDS Data Output | Four differential data lanes; TxOUT3 tri-stated in 18B_MODE = 1; 100 Ω DC-coupled load required |
| TxCLKOUT± | LVDS Clock Output | Differential clock synchronized to serialized data; duty cycle 57:43; 100 Ω DC-coupled load required |
| 18B_MODE | Mode Configuration Input | Logic 0 = 24-bit RGB (4D+C); Logic 1 = 18-bit RGB (3D+C); internal pull-down default |
| VOD_SEL | VOD Select Input | Logic 0 = ±180 mV (low-power); Logic 1 = ±300 mV (longer reach); internal pull-down default |
| RFB | Strobe Edge Select | Logic 0 = latch on falling CLK edge (default); Logic 1 = latch on rising edge; internal pull-down |
| PDB | Power Down Bar Input | Logic 0 = sleep mode (ultra-low current, outputs pulled to GND); Logic 1 = active; internal pull-down |
| VDD / VDDTX / VDDPLL | Power Inputs | Separate 1.8V supplies for digital core, LVDS drivers, and PLL - require individual 0.1 µF bypassing |
| GND / DAP | Ground Terminals | Multiple GND pins + exposed thermal pad (DAP) - must be soldered to PCB ground plane for thermal & EMI performance |
Key Features
| Feature | Design Value |
|---|---|
| 4D+C LVDS Interface | Reduces 28-wire LVCMOS video bus to 10-wire LVDS (4 data pairs + 1 clock pair), cutting EMI and routing complexity |
| 18/24-bit RGB Mode Switching | Hardware-selectable via 18B_MODE pin - disables TxOUT3 and associated inputs to save ~20% dynamic power in 18bpp systems |
| Programmable Output Swing | VOD_SEL pin selects ±180 mV (low EMI) or ±300 mV (robust long-cable operation) without external components |
| Integrated Sleep Control | PDB pin places entire device-including PLL and LVDS drivers-into sub-200 µA sleep state, enabling instant-on/off display power management |
| Edge-Selectable Latching | RFB pin configures input sampling on rising or falling pixel clock edge, allowing synchronization with diverse GPU timing schemes |
| Spread-Spectrum Clock Support | Accepts spread-spectrum pixel clocks without degradation - reduces peak EMI emissions in battery-powered displays |
Applications
| eBook Display Interface | Media Tablet Video Link |
|---|---|
Use Scenario: High-resolution eInk or LCD panel in ultra-thin eBook reader with strict power budget and compact PCB layout. IC Role / Device Role / Timing Role: Serializer bridging application processor's 1.8V RGB interface to display module's FPD-Link input; handles 1024×768@60Hz with DE/HS/VS signaling. Use Value: 50 mW typical power at 65 MHz enables >10-hour battery life; 6×6 mm WQFN footprint saves board space; sleep mode cuts standby current to <200 µA. |
Use Scenario: 1280×800 IPS LCD in Android-based media tablet requiring robust noise immunity and fast wake-up. IC Role / Device Role / Timing Role: Parallel-to-LVDS translator driving display TCON; accepts GPU's 1.8V LVCMOS outputs and generates compliant 4D+C LVDS stream. Use Value: Sub-110 ps channel skew ensures clean eye diagrams at 80 MHz; ±300 mV VOD option supports 30 cm flex cable; PDB-controlled sleep enables instant screen-off. |
| Netbook Main Display Driver | Portable Medical Monitor Interface |
Use Scenario: 1366×768 display in fanless netbook where thermal headroom and EMI are critical constraints. IC Role / Device Role / Timing Role: Serializer between Intel Atom graphics and LVDS display; manages 24-bit RGB, H/V sync, and data enable with precise timing alignment. Use Value: Spread-spectrum clock compatibility lowers radiated emissions below FCC Class B limits; 1.8V-only supply simplifies PMIC design. |
Use Scenario: Diagnostic-grade 1024×768 medical display in portable ultrasound unit requiring deterministic latency and reliability. IC Role / Device Role / Timing Role: Fixed-function serializer ensuring bit-accurate transmission of grayscale and color video frames from FPGA-based imaging pipeline. Use Value: Guaranteed 25–105 MHz operation covers all clinical frame rates; RFB-configurable latching aligns with FPGA output timing; RoHS/MSL-1 rating supports medical manufacturing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LVDS serializer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS90C187SQE/NOPB | Pin-compatible 28-bit serializer with identical 4D+C LVDS output, but adds built-in spread-spectrum clock generator (SSCG) and enhanced jitter performance | Preferred for new designs requiring lower EMI without external SSCG; not drop-in if SSCG is unused or conflicts with system clock architecture | Select DS90C187SQE/NOPB when integrated SSCG and tighter jitter specs (<0.025 UI) are required; otherwise DS90C185SQE/NOPB remains optimal for cost-sensitive, low-power implementations |
| SN65LVDS31IPW | 5-channel LVDS line driver (no serialization logic); requires external parallel-to-serial logic; 3.3V supply only; no 18B_MODE or VOD_SEL | Only suitable for custom serializer designs using FPGA/CPLD; lacks integrated timing, power management, and mode control of DS90C185SQE/NOPB | Choose SN65LVDS31IPW only if existing design already implements serialization in FPGA and needs only LVDS level translation; not a functional replacement for DS90C185SQE/NOPB |
Compared with DS90C187SQE/NOPB, DS90C185SQE/NOPB offers lower cost and simpler power sequencing but lacks integrated SSCG; compared with SN65LVDS31IPW, it delivers complete system-level functionality - eliminating FPGA logic, reducing BOM count, and enabling direct GPU-to-display connection with minimal layout overhead.
Availability
DS90C185SQE/NOPB is available at Aetrix Electronics and suitable for portable display monitors, media tablets, and eBook readers requiring stable component supply, RoHS-compliant packaging, and guaranteed -10°C to +70°C industrial temperature operation.
Supply support for DS90C185SQE/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with decades of leadership in interface ICs and display solutions.
The DS90C185SQE/NOPB belongs to TI's FPD-Link serializer family, designed specifically for low-power, high-resolution mobile display interfaces - balancing bandwidth, power efficiency, and PCB area savings in battery-operated devices.
FAQ
What is the primary function of the DS90C185SQE/NOPB in a display system?
The DS90C185SQE/NOPB serves as a parallel-to-LVDS serializer that converts a 28-bit 1.8V LVCMOS video interface (24-bit RGB + HSync/VSync/DE + GP) into a 4-data-lane + clock FPD-Link LVDS stream. It enables compact, low-EMI, high-speed connection between GPUs and LCD/TFT panels - a core component in the display signal chain of portable electronics. DS90C185SQE/NOPB integrates PLL, mode control, and power management to eliminate external logic.
Does the DS90C185SQE/NOPB support both 18-bit and 24-bit RGB color depths?
Yes, DS90C185SQE/NOPB supports both modes via the 18B_MODE pin: logic LOW configures 24-bit RGB with full 4D+C LVDS output; logic HIGH enables 18-bit RGB (RGB-666) with TxOUT3 tri-stated to reduce power and EMI. The device automatically ignores corresponding LVCMOS inputs (D27–D22) in 18-bit mode. DS90C185SQE/NOPB does not perform color conversion - it serializes only the bits presented on its D[27:0] bus per configuration.
What are the power supply requirements for the DS90C185SQE/NOPB?
DS90C185SQE/NOPB requires three separate 1.8V supplies: VDD (digital core), VDDTX (LVDS drivers), and VDDPLL (PLL circuitry). Each must be independently bypassed with ≥0.1 µF ceramic capacitors; VDDPLL additionally requires a 4.7–22 µF bulk capacitor. Supply noise must remain <90 mVPP. DS90C185SQE/NOPB draws 31–45 mA typical at 75 MHz and drops to 18–200 µA in PDB-enabled sleep mode.
How does the RFB pin affect timing behavior in the DS90C185SQE/NOPB?
The RFB pin selects the pixel clock edge used to latch LVCMOS input data: RFB = LOW (default, internal pull-down) latches on the falling edge of CLK; RFB = HIGH latches on the rising edge. This allows DS90C185SQE/NOPB to synchronize with GPUs that output data aligned to either clock transition. The setting is independent of the deserializer's output strobe and directly impacts setup/hold timing margins at the input interface.
Is the DS90C185SQE/NOPB compatible with standard LVDS receivers?
Yes, DS90C185SQE/NOPB LVDS outputs comply fully with ANSI/TIA/EIA-644-A specifications, including differential voltage (±180/±300 mV), common-mode range (0.8–1.0 V), and skew (<110 ps). It drives standard 100 Ω differential loads and interoperates with TI deserializers (e.g., DS90C186), third-party FPD-Link receivers, and generic LVDS input buffers - provided the receiving device supports 4D+C framing and matching color mapping.
DS90C185SQE/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 48-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Serializer
- Data Rate:
- 2.94Gbps
- Input Type:
- LVCMOS
- Output Type:
- FPD-Link, LVDS
- Number of Inputs:
- 28
- Number of Outputs:
- 4
- Voltage - Supply:
- 1.71V ~ 1.89V
- Operating Temperature:
- -10°C ~ 70°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-WQFN (6x6)
DS90C185SQE/NOPB FAQ
1.How can I place an order for DS90C185SQE/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for DS90C185SQE/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS90C185SQE/NOPB reliable?
The price and inventory of DS90C185SQE/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS90C185SQE/NOPB is usually 5 days.
3.What payment methods are accepted for DS90C185SQE/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS90C185SQE/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS90C185SQE/NOPB?
DS90C185SQE/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS90C185SQE/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS90C185SQE/NOPB?
For technical support, including DS90C185SQE/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS90C185SQE/NOPB requirements.
6.How does Aetrix verify that DS90C185SQE/NOPB is sourced from the original manufacturer or authorized distributors?
All DS90C185SQE/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS90C185SQE/NOPB meets industry standards.
7.What is the process for return or replacement of DS90C185SQE/NOPB?
All DS90C185SQE/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with DS90C185SQE/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS90C185SQE/NOPB part is unused and in its original packaging.
Return procedure for DS90C185SQE/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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