Texas Instruments DS90C363BMT

Overview

DS90C363BMT from Texas Instruments is a +3.3V programmable LVDS transmitter for 18-bit flat panel display (FPD) links, converting 21-bit CMOS/TTL data (18 RGB + 3 control) into three LVDS data streams plus one LVDS clock stream at up to 65 MHz. It delivers 455 Mbps per channel and 170 MB/s total bandwidth, supporting VGA through Dual Pixel SXGA displays in compact LCD timing interfaces.

For engineers reviewing the DS90C363BMT datasheet, DS90C363BMT pinout, DS90C363BMT application, or DS90C363BMT equivalent, key selection considerations include its programmable rising/falling edge strobe mode, spread spectrum clock support up to 100 kHz ±2.5%, sub-130 mW typical power at 65 MHz, and compatibility with TIA/EIA-644 LVDS standard in a 48-pin TSSOP package.

Technical Context

The DS90C363BMT integrates a fully integrated PLL with no external components required, synchronizing the LVDS clock output (TxCLK OUT±) to the input clock (FPSHIFT IN/TxCLK IN) across 18–68 MHz. Its input accepts 3.3V LVTTL/LVCMOS levels-not 5V tolerant-and supports both rising- and falling-edge data strobing via the R_FB pin configuration.

It features an "Input Clock Detection" function that pulls all LVDS outputs low when the input clock is missing and /PWR DOWN is high, enabling fail-safe behavior in display timing systems. Power-down mode draws <37 μW typical, and the device maintains best-in-class set/hold times (TSTC = 2.5 ns, THTC = 0.5 ns) for robust sampling of high-speed video data.

Key Specifications

Pinout & Package

DS90C363BMT is housed in a 48-pin TSSOP (DGG) package, 12.6 mm × 6.2 mm × 1.2 mm max height, RoHS-compliant, MSL Level-2-260°C-1 year, with exposed pad not present and standard lead finish (Sn).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LVDS transmitter applications.

Compared with DS90C363AMT and SN75LVDS84DGGR, DS90C363BMT provides superior timing margins, programmable strobe edge, and verified spread spectrum tracking-enabling reliable high-resolution display links in thermally and EMI-sensitive applications without design compromises.

Availability

DS90C363BMT is available at Aetrix Electronics and suitable for LCD panel timing interfaces, embedded graphics modules, automotive instrument clusters, and avionics display subsystems requiring stable component supply and long-term manufacturability.

Supply support for DS90C363BMT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions for industrial, automotive, and consumer applications.

The DS90C363BMT belongs to TI's FPD-Link family, designed specifically to replace wide parallel TTL interfaces in flat-panel displays with compact, low-EMI LVDS serial links for improved signal integrity and reduced interconnect cost.

FAQ

What is the maximum supported pixel clock frequency for DS90C363BMT?

The DS90C363BMT supports input clock frequencies from 18 MHz to 68 MHz, with full specification validated up to 65 MHz. At 65 MHz, it transmits 18-bit RGB and 3 control bits at 455 Mbps per LVDS channel, achieving 170 MB/s total bandwidth. Operation beyond 65 MHz is not characterized or guaranteed per the official datasheet.

Does DS90C363BMT support spread spectrum clocking, and what are the limits?

Yes, DS90C363BMT supports spread spectrum clocking (SSCG) with modulation frequencies up to 100 kHz and deviations of ±2.5% center spread or −5% down spread, verified at 25 MHz, 40 MHz, and 65 MHz input clocks. The device accurately tracks SSC-modulated input clocks on both TxCLK OUT± and LVDS data outputs, preserving EMI reduction across the entire FPD-Link interface.

How is strobe edge polarity selected on DS90C363BMT?

Strobe edge polarity on DS90C363BMT is selected via the R_FB pin: tying R_FB to GND (or leaving it unconnected, relying on internal pull-down) configures falling-edge strobe operation; connecting R_FB to VCC selects rising-edge strobe. This programmability allows seamless interoperability with either DS90CF366 (falling-edge receiver) or rising-edge receivers without external logic.

What are the power supply requirements for DS90C363BMT?

DS90C363BMT requires three separate 3.3V supplies: VCC for TTL inputs (3 pins), PLL VCC for the phase-locked loop (1 pin), and LVDS VCC for LVDS drivers (1 pin). Each has dedicated ground returns (GND, PLL GND, LVDS GND). Supply voltage must be maintained between 3.0 V and 3.6 V; the device is not 5V tolerant on any input.

Is DS90C363BMT pin-compatible with earlier versions like DS90C363AMT?

Yes, DS90C363BMT is a pin-for-pin replacement for DS90C363AMT and backward compatible with DS90C363/DS90CF363. All share identical 48-pin TSSOP (DGG) packaging, pin mapping, and functional interface. However, DS90C363BMT adds improved set/hold timing, enhanced SSCG support, and lower power consumption - making it a drop-in upgrade for existing designs.