Texas Instruments DS90C363BMT/NOPB

Overview

DS90C363BMT/NOPB from Texas Instruments is a +3.3V programmable LVDS transmitter for 18-bit flat-panel display (FPD) links, supporting 18–68 MHz shift clocks and delivering 455 Mbps per LVDS channel at 65 MHz. It converts 21-bit CMOS/TTL input (18 RGB + 3 control) into three LVDS data streams plus one LVDS clock stream, enabling high-bandwidth, low-EMI video interface in LCD timing applications.

For engineers reviewing the DS90C363BMT/NOPB datasheet, DS90C363BMT/NOPB pinout, DS90C363BMT/NOPB application, or DS90C363BMT/NOPB equivalent, key selection criteria include its programmable rising/falling edge strobe mode via R_FB pin, spread spectrum clocking support up to ±2.5% center spread, sub-1ns LVDS transition times, and compatibility with VGA/SVGA/XGA/Dual-Pixel SXGA displays.

Technical Context

The DS90C363BMT/NOPB implements a fully integrated PLL with no external components required, synchronizing the LVDS clock output (TxCLK OUT±) to the input clock (FPSHIFT IN) with typical delay of 3.0–7.2 ns. Its internal architecture supports both rising- and falling-edge data strobing, selected by R_FB pin biasing-GND/NC for falling edge, VCC for rising edge-enabling interoperability with receivers like DS90CF366 without translation logic.

It features dedicated power-down functionality (PWR DOWN pin), reducing supply current to <37 μW in standby, and includes input clock detection that pulls all LVDS outputs low when FPSHIFT IN is missing and PWR DOWN is high. The device uses separate power domains (VCC, PLL VCC, LVDS VCC) with independent ground pins to minimize noise coupling between TTL inputs, PLL, and LVDS drivers.

Key Specifications

Pinout & Package

DS90C363BMT/NOPB is housed in a 48-pin TSSOP (DGG) package with 0.5 mm pitch, 12.4–12.6 mm × 6.0–6.2 mm body, and 1.2 mm max height - optimized for compact LCD timing board layouts and compatible with standard SMT assembly processes.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LVDS FPD-Link transmitter applications.

Compared with DS90C363AMT/NOPB and SN75LVDS84DGGR, DS90C363BMT/NOPB delivers superior timing margins, integrated SSC tracking, and programmable strobe edge - directly enabling single-design reuse across multiple display resolutions and receiver generations without hardware changes.

Availability

DS90C363BMT/NOPB is available at Aetrix Electronics and suitable for industrial LCD timing interfaces, embedded graphics modules, automotive infotainment displays, and avionics panel video distribution requiring stable component supply and long-lifecycle support.

Supply support for DS90C363BMT/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with decades of leadership in high-speed interface ICs and display solutions.

The DS90C363BMT/NOPB belongs to TI's FPD-Link family, engineered specifically for reliable, low-EMI video transport in flat-panel display systems - balancing speed, power efficiency, and electromagnetic compatibility in harsh electrical environments.

FAQ

What is the function of the R_FB pin on DS90C363BMT/NOPB?

The R_FB pin on DS90C363BMT/NOPB selects the data strobe edge: tying it to GND or leaving it unconnected configures falling-edge sampling, while connecting it to VCC enables rising-edge sampling. This programmability allows DS90C363BMT/NOPB to interoperate with either DS90CF366 (falling-edge) or rising-edge receivers without external logic - a key differentiator from fixed-strobe alternatives like SN75LVDS84DGGR.

Does DS90C363BMT/NOPB support spread spectrum clocking, and what are the limits?

Yes, DS90C363BMT/NOPB supports spread spectrum clocking with modulation frequencies up to 100 kHz and deviations of ±2.5% center spread or −5% down spread across its full 18–68 MHz input clock range. The device accurately tracks SSC-modulated inputs on FPSHIFT IN and reflects the modulation on TxCLK OUT±, directly reducing EMI peaks without compromising data integrity - verified per TI's SNLS179F datasheet Section 7.4.

What are the power supply requirements for DS90C363BMT/NOPB?

DS90C363BMT/NOPB requires three independent 3.3V supplies: VCC (for TTL inputs), PLL VCC (for phase-locked loop), and LVDS VCC (for LVDS drivers), each decoupled with separate bypass capacitors. The recommended operating range is 3.0–3.6 V, with typical active current draw of 39–50 mA at 65 MHz and power-down current below 37 μW - detailed in Electrical Characteristics Table 3 of the DS90C363BMT/NOPB datasheet.

How does the input clock detection feature work on DS90C363BMT/NOPB?

When the FPSHIFT IN clock is missing and the PWR DOWN pin is held high, DS90C363BMT/NOPB automatically pulls all LVDS output pairs (TxOUT± and TxCLK OUT±) to logic low - preventing undefined states at the receiver. This fail-safe behavior is implemented internally and requires no external circuitry, enhancing system robustness in graphics controller reset or clock glitch scenarios.

Is DS90C363BMT/NOPB pin-compatible with earlier versions like DS90C363A?

Yes, DS90C363BMT/NOPB is a pin-for-pin replacement for DS90C363AMT/NOPB and backward compatible with DS90C363/DS90CF363, as confirmed in the Applications Information section of the SNLS179F datasheet. All 48-pin TSSOP connections, power domains, and signal mappings remain identical - enabling drop-in upgrades to gain improved timing margins, SSC support, and lower power consumption.