Texas Instruments DS90CF363BMT/NOPB

Overview

DS90CF363BMT/NOPB from Texas Instruments is a +3.3V programmable LVDS transmitter for 18-bit flat panel display (FPD) Link applications, supporting 18–68 MHz shift clock and delivering up to 1.3 Gbps throughput across three LVDS data lanes plus one LVDS clock lane. It converts 21 CMOS/TTL inputs (18 RGB + 3 control) into LVDS differential streams and features integrated PLL with no external components required. Used in LCD timing interfaces for VGA/SVGA/XGA/Dual-Pixel SXGA displays.

For engineers reviewing the DS90CF363BMT/NOPB datasheet, DS90CF363BMT/NOPB pinout, DS90CF363BMT/NOPB application, or DS90CF363BMT/NOPB equivalent, key selection criteria include FPD-Link falling-edge strobe compatibility, 345 mV typical LVDS swing, <130 mW power consumption at 65 MHz, spread-spectrum clock support up to 100 kHz ±2.5%, and TSSOP-48 package integration with robust input sequencing.

Technical Context

The DS90CF363BMT/NOPB implements a fixed falling-edge strobe architecture synchronized to TxCLKIN, sampling 21 parallel TTL inputs per clock cycle and mapping them to four LVDS differential pairs (three data, one clock). Its PLL locks to input clock frequencies from 18–68 MHz without external loop filter components and maintains precise bit-to-bit timing alignment-e.g., TPPos0 = ±0.20 ns at 65 MHz.

It supports dual power domains: VCC/PLL VCC/LVDS VCC are all +3.3V supplies, with separate ground pins for TTL, PLL, and LVDS sections to minimize noise coupling. The device includes input clock detection logic that forces all LVDS outputs low when TxCLKIN is missing and /PD is high, enabling fail-safe behavior in display timing systems.

Key Specifications

Pinout & Package

DS90CF363BMT/NOPB uses a 48-pin TSSOP (DGG0048A) package with 0.5 mm pitch, 12.4–12.6 mm length, 6.0–6.2 mm width, and 1.2 mm max height. Pin 1 marked with corner chamfer; recommended land pattern per IPC-7351.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LVDS FPD-Link transmitter applications.

Compared with DS90CF363AMT/NOPB and SN75LVDS84PWR, DS90CF363BMT/NOPB delivers 40% lower power, built-in spread-spectrum clock tracking, and autonomous clock-loss handling - making it the preferred choice for new FPD-Link designs targeting EMI compliance, thermal efficiency, and functional safety.

Availability

DS90CF363BMT/NOPB is available at Aetrix Electronics and suitable for LCD timing interfaces, embedded display modules, video graphics adapters, and automotive infotainment displays requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for DS90CF363BMT/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with decades of experience in display interface solutions.

DS90CF363BMT/NOPB belongs to TI's FPD-Link family, designed specifically for high-speed, low-EMI serialization of RGB and timing signals in flat-panel display systems - balancing performance, power, and PCB integration.

FAQ

What is the operating temperature range for DS90CF363BMT/NOPB?

The DS90CF363BMT/NOPB is specified for operation from −10°C to +70°C ambient temperature. This industrial-grade range supports deployment in commercial and industrial display systems, including enclosed HMIs and automotive cabin environments where ambient temperatures remain within this envelope. The device's thermal derating (16 mW/°C above +25°C) ensures safe operation under sustained load conditions.

Does DS90CF363BMT/NOPB support 5V logic inputs?

No, DS90CF363BMT/NOPB does not support 5V logic inputs. Its TxIN and FPSHIFT IN pins accept only 3.3V LVTTL/LVCMOS levels and are not 5V tolerant. Applying 5V signals may damage the inputs. When interfacing with 5V sources, level-shifting circuitry is required - or consider migration to a 5V-compatible FPD-Link transmitter such as DS90CF563 (discontinued) with appropriate redesign.

Can DS90CF363BMT/NOPB be used with a rising-edge strobe receiver?

No, DS90CF363BMT/NOPB is a fixed falling-edge strobe transmitter and is designed to interoperate only with falling-edge strobe receivers like the DS90CF366. Using it with a rising-edge strobe receiver (e.g., DS90CF364) would result in timing misalignment and data corruption. No internal configuration or external logic can convert its strobe polarity - system-level redesign is required for rising-edge compatibility.

What is the minimum pulse width required on the PWR DOWN pin of DS90CF363BMT/NOPB?

The DS90CF363BMT/NOPB requires a minimum pulse width of 1 µs on the PWR DOWN pin to reliably enter power-down mode. This specification ensures complete tri-state of LVDS outputs and full PLL disablement. Shorter pulses may result in incomplete power-down behavior or metastability. The device also supports asynchronous assertion - PWR DOWN can be asserted at any time, even during active data transmission.

How does DS90CF363BMT/NOPB handle missing input clock conditions?

DS90CF363BMT/NOPB includes dedicated "Input Clock Detection" logic: when TxCLKIN is absent and PWR DOWN is high, all LVDS output pairs (data and clock) are pulled to logic low. This prevents undefined differential states on the link, avoiding false triggering or noise injection at the receiver. The feature operates autonomously without software or external supervision, enhancing system robustness during display sleep or source reconfiguration.