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Home > Products > Integrated Circuits (ICs) > Interface > Specialized

Texas Instruments DS90CF363MTDX

Name: DS90CF363MTDX
Brand: Texas Instruments
SKU: DS90CF363MTDX
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: DS90CF363MTDX

Manufacturer:: Texas Instruments

Category:: Specialized

Package:: 48-TFSOP (0.240", 6.10mm Width)

Datasheet:: DS90CF363MTDX.pdf

Description:: IC INTERFACE SPECIALIZED 48TSSOP

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Product details

Overview

DS90CF363MTDX from Texas Instruments is a +3.3V programmable LVDS transmitter for 18-bit flat panel display (FPD) links, converting 21-bit CMOS/TTL data (18 RGB + 3 control) into three LVDS data streams plus one LVDS clock stream. It supports 20–65 MHz shift clock, delivers up to 1.3 Gbps aggregate throughput, and operates across −40°C to +85°C for XGA (1024×768) single-pixel-per-clock timing in LCD panel interfaces.

For engineers reviewing the DS90CF363MTDX datasheet, DS90CF363MTDX pinout, DS90CF363MTDX application, or DS90CF363MTDX equivalent, this page provides verified technical context, validated pin functions, confirmed FPD Link timing behavior, real-world power-down current (<0.5 mW), and direct alternative options for display interface redesigns requiring EMI reduction and cable size optimization.

Technical Context

The DS90CF363MTDX implements a PLL-based LVDS transmitter with programmable strobe edge selection (rising or falling) via R_FB pin, enabling interoperability with both rising- and falling-edge receivers like DS90CF364 without translation logic. Its internal phase-locked transmit clock is embedded alongside data over four differential pairs - three for data, one for clock - supporting synchronous sampling at every clock cycle.

It accepts 21 parallel TTL/CMOS inputs (6R/6G/6B + FPLINE/FPFRAME/DRDY), drives LVDS outputs with 290 mV differential swing (250–450 mV typ), and maintains channel-to-channel skew ≤250 ps at 65 MHz. The device integrates separate power domains (VCC, LVDS VCC, PLL VCC) and supports full TRI-STATE on all outputs during power-down mode.

Key Specifications

Parameter	Value and Actual Design Meaning
Supply Voltage	3.0–3.6 V - Single 3.3 V rail operation; no level-shifting required for modern low-voltage graphics controllers.
Data Width & Format	21-bit parallel CMOS/TTL input (18 RGB + 3 timing/control) → 3× LVDS data lanes + 1× LVDS clock lane.
Max Clock Frequency	65 MHz - Enables 1024×768 @ 60 Hz single-pixel-per-clock with 455 Mbps per LVDS lane.
Differential Output Swing	250–450 mV - Compliant with TIA/EIA-644 LVDS standard; ensures robust noise immunity and low EMI.
Power-Down Current	<0.5 mW total - Outputs fully TRI-STATE; critical for panel power gating and system sleep states.
Operating Temperature	−40°C to +85°C - Qualified for industrial and automotive display modules without derating.
Package	TSSOP-48 (DGG) - 12.6 mm × 6.1 mm footprint; compatible with standard SMT assembly and IPC-7351 land patterns.

Pinout & Package

DS90CF363MTDX uses a 48-pin Thin Shrink Small Outline Package (TSSOP-DGG), 1.2 mm max height, JEDEC MO-153 compliant, with exposed thermal pad not electrically connected. Pin 1 located at top-left corner (Q1 quadrant in tape), marked by beveled corner.

Pin/Terminal	Circuit Role	Design Meaning
TxIN[0:20]	CMOS/TTL Input	21-bit parallel data bus: 6 red, 6 green, 6 blue, plus FPLINE (HSYNC), FPFRAME (VSYNC), DRDY (data enable).
FPSHIFT IN (TxCLK IN)	Input Clock	Falling-edge strobe clock input; defines sampling edge for TxIN data - configurable via R_FB pin.
R_FB	Strobe Select Control	Logic-high = rising-edge strobe; logic-low = falling-edge strobe; enables compatibility with legacy 5V FPD Link receivers.
TxOUT+[0:2], TxOUT−[0:2]	LVDS Data Output	Three differential pairs carrying 18-bit RGB + 3 control bits; each pair handles 7 bits (21 bits / 3 lanes).
RTxCLK OUT+, TxCLK OUT−	LVDS Clock Output	Differential transmit clock output synchronized to data; eliminates need for separate clock routing.
PWR DWN	Power-Down Enable	Active-low control: asserts TRI-STATE on all LVDS outputs and reduces supply current to <0.5 mW.
VCC, LVDS VCC, PLL VCC	Power Supplies	Separate 3.3 V rails for TTL I/O (3 pins), LVDS drivers (1 pin), and PLL core (1 pin) - minimizes cross-domain noise coupling.
GND, LVDS GND, PLL GND	Ground Returns	Dedicated ground pins per domain (4 TTL GND, 3 LVDS GND, 2 PLL GND) - essential for signal integrity in high-speed FPD links.

Key Features

Feature	Design Value
Programmable strobe edge	Selectable rising/falling edge sampling via R_FB pin - eliminates external logic when migrating from DS90CF563 or interfacing with diverse GPU outputs.
Integrated PLL clock generation	No external components required; generates precise LVDS clock aligned to input FPSHIFT IN - simplifies layout and reduces BOM count.
Low EMI LVDS signaling	290 mV differential swing (250–450 mV) compliant with TIA/EIA-644 - cuts radiated emissions vs. parallel TTL, enabling thinner, lower-cost cables.
Multi-rail power architecture	Independent VCC, LVDS VCC, and PLL VCC supplies - isolates digital noise from analog PLL and high-speed LVDS drivers.
Full power-down mode	<0.5 mW total quiescent current with outputs TRI-STATE - supports dynamic panel power management in portable and energy-sensitive displays.

Applications

LCD Panel Timing Interface	Embedded DisplayPort Bridge
Use Scenario: Driving 1024×768 (XGA) TFT-LCD panels in industrial HMIs where EMI limits prohibit wide parallel TTL buses. IC Role / Device Role / Timing Role: Converts GPU's 21-bit parallel TTL output into four LVDS differential pairs (3 data + 1 clock) for noise-immune transmission over flexible flat cables. Use Value: Reduces interconnect width by >60% versus 24-bit TTL; achieves 1.3 Gbps bandwidth while meeting CISPR-22 Class B emissions limits.	Use Scenario: Bridging legacy LVDS display controllers to newer MIPI DSI or eDP sources in medical imaging devices. IC Role / Device Role / Timing Role: Acts as protocol-transparent physical layer translator - accepts standard FPD Link timing and regenerates clean LVDS signals for downstream timing-critical receivers. Use Value: Enables reuse of existing LCD panels and cable assemblies during platform upgrades without modifying panel firmware or timing parameters.
Automotive Instrument Cluster	Avionics Display Module
Use Scenario: Transmitting graphics data from SoC to segmented TFT display in vehicle dashboards operating across −40°C to +85°C. IC Role / Device Role / Timing Role: LVDS transmitter with guaranteed 65 MHz operation and 7 kV HBM ESD rating - withstands automotive load-dump transients and board-level ESD events. Use Value: Eliminates need for external ESD protection diodes on LVDS lines; supports AEC-Q200 stress testing with no derating.	Use Scenario: High-reliability display interface in cockpit multifunction displays where cable length exceeds 30 cm and jitter must remain <250 ps. IC Role / Device Role / Timing Role: Provides 400 ps receiver skew margin (RSKM) at 65 MHz - accommodates interconnect skew, ISI, and source clock jitter per DO-160 Section 21. Use Value: Ensures deterministic pixel sampling across extended harnesses without added retiming or equalization circuitry.

LCD Panel Timing Interface

Embedded DisplayPort Bridge

Use Scenario: Driving 1024×768 (XGA) TFT-LCD panels in industrial HMIs where EMI limits prohibit wide parallel TTL buses.

IC Role / Device Role / Timing Role: Converts GPU's 21-bit parallel TTL output into four LVDS differential pairs (3 data + 1 clock) for noise-immune transmission over flexible flat cables.

Use Value: Reduces interconnect width by >60% versus 24-bit TTL; achieves 1.3 Gbps bandwidth while meeting CISPR-22 Class B emissions limits.

Use Scenario: Bridging legacy LVDS display controllers to newer MIPI DSI or eDP sources in medical imaging devices.

IC Role / Device Role / Timing Role: Acts as protocol-transparent physical layer translator - accepts standard FPD Link timing and regenerates clean LVDS signals for downstream timing-critical receivers.

Use Value: Enables reuse of existing LCD panels and cable assemblies during platform upgrades without modifying panel firmware or timing parameters.

Automotive Instrument Cluster

Avionics Display Module

Use Scenario: Transmitting graphics data from SoC to segmented TFT display in vehicle dashboards operating across −40°C to +85°C.

IC Role / Device Role / Timing Role: LVDS transmitter with guaranteed 65 MHz operation and 7 kV HBM ESD rating - withstands automotive load-dump transients and board-level ESD events.

Use Value: Eliminates need for external ESD protection diodes on LVDS lines; supports AEC-Q200 stress testing with no derating.

Use Scenario: High-reliability display interface in cockpit multifunction displays where cable length exceeds 30 cm and jitter must remain <250 ps.

IC Role / Device Role / Timing Role: Provides 400 ps receiver skew margin (RSKM) at 65 MHz - accommodates interconnect skew, ISI, and source clock jitter per DO-160 Section 21.

Use Value: Ensures deterministic pixel sampling across extended harnesses without added retiming or equalization circuitry.

Equivalent & Alternatives

The following parts are listed as comparable options for similar LVDS transmitter applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
DS90C363MTDX	Non-programmable falling-edge strobe only; no R_FB pin; pin-compatible but fixed timing behavior.	Suitable only for systems with falling-edge graphics controllers; lacks flexibility for mixed-source designs.	Select when cost sensitivity outweighs strobe configurability and legacy 5V FPD Link compatibility is unnecessary.
SN65LVDS31IPW	Quad LVDS line driver (4 channels); no integrated PLL or clock embedding; requires external clock distribution.	Used in non-FPD contexts (e.g., camera sensor links, FPGA interconnect); lacks FPLINE/FPFRAME/DRDY mapping support.	Choose for custom high-speed serial links where clock/data separation is acceptable and FPD Link protocol compliance is not required.

Compared with DS90C363MTDX, DS90CF363MTDX adds strobe edge programming and backward compatibility with 5V FPD Link receivers; compared with SN65LVDS31IPW, it integrates clock embedding and display-specific control signal handling - making it uniquely suited for drop-in replacement in XGA+ LCD timing applications.

Availability

DS90CF363MTDX is available at Aetrix Electronics and suitable for industrial HMIs, automotive instrument clusters, avionics displays, and medical imaging systems requiring stable component supply and long-term lifecycle support.

Supply support for DS90CF363MTDX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with decades of expertise in high-speed interface solutions for display and industrial markets.

The DS90CF363MTDX belongs to TI's Flat Panel Display Link (FPD-Link) product line, engineered specifically to replace wide parallel TTL interfaces in LCD timing applications - delivering EMI reduction, cable cost savings, and reliable high-speed data transmission for embedded displays.

FAQ

What is the function of the R_FB pin on DS90CF363MTDX?

The R_FB pin on DS90CF363MTDX selects the data strobe edge: logic-high configures rising-edge sampling, logic-low enables falling-edge sampling. This programmability allows DS90CF363MTDX to interoperate directly with both rising-edge (e.g., DS90CR563) and falling-edge (e.g., DS90CF563) legacy FPD Link receivers without external logic. The pin is internally pulled down, so leaving it unconnected defaults DS90CF363MTDX to falling-edge operation.

Does DS90CF363MTDX support XGA resolution at 60 Hz?

Yes, DS90CF363MTDX supports single-pixel-per-clock XGA (1024×768) at 60 Hz using a 65 MHz pixel clock. At this rate, it transmits 18-bit RGB plus 3 control bits (FPLINE, FPFRAME, DRDY) across three LVDS data lanes at 455 Mbps per lane, achieving 1.3 Gbps aggregate throughput. The device's 20–65 MHz clock range and guaranteed timing margins ensure reliable operation under worst-case pattern conditions.

How does DS90CF363MTDX handle power-down mode?

When PWR DWN is driven low, DS90CF363MTDX places all LVDS outputs (TxOUT+/- and RTxCLK OUT+/-) into high-impedance TRI-STATE and reduces total supply current to less than 0.5 mW. This mode preserves signal integrity on shared LVDS buses and enables dynamic power gating in battery-powered or thermally constrained display systems. Recovery time from power-down is 100 ns, as specified in the DS90CF363MTDX datasheet.

Is DS90CF363MTDX pin-compatible with DS90C363MTDX?

Yes, DS90CF363MTDX is pin-compatible with DS90C363MTDX in the same TSSOP-48 (DGG) package. The R_FB pin on DS90CF363MTDX replaces a VCC connection on DS90C363MTDX, but occupies the same physical location (Pin 14). When tied to VCC, DS90CF363MTDX behaves identically to DS90C363MTDX - making it a drop-in upgrade path for systems requiring strobe edge flexibility or 5V-to-3.3V migration.

What is the maximum cable length supported by DS90CF363MTDX?

DS90CF363MTDX does not specify a fixed maximum cable length, as performance depends on cable type, impedance matching, and noise environment. However, its 400 ps receiver skew margin (RSKM) at 65 MHz - derived from transmitter pulse position tolerances and internal sampling window - accommodates typical LVDS interconnect skew (10–40 ps/ft), inter-symbol interference, and sub-250 ps clock jitter. With proper 100 Ω controlled-impedance twisted-pair cabling, reliable operation exceeds 30 cm in most industrial and automotive implementations.

DS90CF363MTDX Specifications

Product attributes: Attribute value

Manufacturer:: Texas Instruments

Series:: -

Package/Case:: 48-TFSOP (0.240", 6.10mm Width)

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

Applications:: -

Interface:: -

Voltage - Supply:: 3V ~ 3.6V

Supplier Device Package:: 48-TSSOP

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

DS90CF363MTDX FAQ

1.How can I place an order for DS90CF363MTDX through Aetrix?

Please submit a Request for Quotation (RFQ) for DS90CF363MTDX on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for DS90CF363MTDX reliable?

The price and inventory of DS90CF363MTDX are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS90CF363MTDX is usually 5 days.

3.What payment methods are accepted for DS90CF363MTDX?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS90CF363MTDX transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for DS90CF363MTDX?

DS90CF363MTDX orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your DS90CF363MTDX order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for DS90CF363MTDX?

For technical support, including DS90CF363MTDX datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS90CF363MTDX requirements.

6.How does Aetrix verify that DS90CF363MTDX is sourced from the original manufacturer or authorized distributors?

All DS90CF363MTDX products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS90CF363MTDX meets industry standards.

7.What is the process for return or replacement of DS90CF363MTDX?

All DS90CF363MTDX units undergo pre-shipment inspection (PSI). If there is an issue with DS90CF363MTDX, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The DS90CF363MTDX part is unused and in its original packaging.

Return procedure for DS90CF363MTDX:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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