Texas Instruments DS90CF384AQMT/NOPB
- Part No.:
- DS90CF384AQMT/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Specialized
- Package:
- 56-TFSOP (0.240", 6.10mm Width)
- Datasheet:
-
DS90CF384AQMT/NOPB.pdf
- Description:
- IC INTERFACE SPECIALIZED 56TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:2,038
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Product details
Overview
DS90CF384AQMT/NOPB from Texas Instruments is an automotive-grade LVDS receiver IC for FPD-Link interface, converting four LVDS data streams (up to 1.8 Gbps) into 28-bit parallel LVCMOS/LVTTL output - including 24-bit RGB and 4-bit video control (HSYNC, VSYNC, DE, CNTL) - operating at 20–65 MHz clock rates with 50% duty cycle RxCLK OUT and <142 mW typical power consumption at 65 MHz grayscale.
For engineers reviewing the DS90CF384AQMT/NOPB datasheet, DS90CF384AQMT/NOPB pinout, DS90CF384AQMT/NOPB application, or DS90CF384AQMT/NOPB equivalent, this page delivers verified technical context, AEC-Q100 Grade 3 qualification status, TSSOP-56 package mapping, set/hold timing margins, and direct alternatives for flat-panel display interconnect design in automotive infotainment and industrial HMI systems.
Technical Context
The DS90CF384AQMT/NOPB implements a PLL-based clock recovery architecture that locks to incoming LVDS clock (RxCLK IN±) without external components and generates a clean TTL-level RxCLK OUT with programmable edge alignment. Its internal data sampling window is defined by precise input strobe positions (RSPos0–RSPos6), enabling robust capture of high-speed serialized video data across cable lengths up to several meters.
It supports dual-mode operation: full-rate 28-bit output (24 RGB + 4 control) with best-in-class setup/hold times (RSRC ≥4.5 ns, RHRC ≥4.0 ns), and low-power mode (<200 µW max) via TTL-level PWR DOWN pin. Input compatibility with TIA/EIA-644 LVDS ensures interoperability with DS90C383B and other FPD-Link transmitters.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 3.0–3.6 V - Ensures stable operation across automotive battery variations and noise margins. |
| Data Throughput | 1.8 Gbps - Supports dual-pixel SXGA (1280×1024@60Hz) and higher-resolution displays. |
| Operating Temp | −40°C to +85°C - Validated for under-dash automotive environments per AEC-Q100 Grade 3. |
| RxCLK OUT Duty Cycle | 50% ±10% - Enables reliable synchronous sampling of 28-bit parallel outputs with minimal skew. |
| Power Consumption | 43 mA @ 65 MHz (16-grayscale pattern) - Optimized for thermal management in compact display modules. |
| ESD Rating | >7 kV HBM - Robust handling during assembly and field service in industrial and automotive settings. |
| Input Skew Margin | 500 ps @ 65 MHz - Accommodates interconnect skew, ISI, and source jitter ≤250 ps for reliable link margin. |
Pinout & Package
DS90CF384AQMT/NOPB uses a 56-pin Low-Profile TSSOP (DGG) package with 0.5 mm pitch, 13.9–14.1 mm length, 6.0–6.2 mm width, and 1.2 mm max height - optimized for space-constrained display controller PCBs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RxIN+ / RxIN− | LVDS differential data inputs (×4 pairs) | Accept serialized FPD-Link data streams; require controlled 100 Ω differential trace impedance. |
| RxCLK IN+ / RxCLK IN− | LVDS differential clock input | Reference clock for PLL recovery; determines output data rate and timing alignment. |
| RxCLK OUT | TTL-level recovered clock output | Falling edge serves as data strobe for synchronous latching of 28-bit parallel outputs. |
| RxOUT[0:27] | TTL-level parallel outputs | 24-bit RGB (8R/8G/8B) + 4 control lines (FPLINE/FPFRAME/DRDY/CNTL); drive standard LVCMOS loads. |
| PWR DOWN | Active-low power-down control | Asserting low forces all RxOUT pins low and reduces supply current to <55 µA - enables dynamic power gating. |
| VCC / GND (×4 / ×5) | LVCMOS/LVTTL power and ground | Dedicated supply/ground pins minimize switching noise coupling into sensitive LVDS receivers. |
| PLL VCC / PLL GND | PLL core power domain | Isolated analog supply improves jitter performance and lock stability over temperature and voltage. |
| LVDS VCC / LVDS GND | LVDS input bias supply | Separate rail ensures consistent common-mode level and input threshold accuracy for LVDS inputs. |
Key Features
| Feature | Design Value |
|---|---|
| No external PLL components | Reduces BOM count and layout area; eliminates tuning variability in production. |
| Best-in-class set/hold times | RSRC ≥4.5 ns and RHRC ≥4.0 ns enable reliable capture at 65 MHz with margin for board-level skew. |
| AEC-Q100 Grade 3 qualification | Validated for automotive infotainment systems requiring −40°C to +85°C operation and long-term reliability. |
| Low-power shutdown mode | <200 µW max power-down current allows seamless integration into energy-conscious display subsystems. |
| Support for VGA–Dual Pixel SXGA | Enables reuse across multiple display resolutions without redesigning the serializer/deserializer interface. |
Applications
| Automotive Digital Instrument Clusters | Industrial HMI Display Modules |
|---|---|
|
Use Scenario: High-reliability video transmission from MCU-based graphics controller to TFT-LCD panel in vehicle dashboard. IC Role / Device Role / Timing Role: LVDS deserializer recovering pixel and sync data from FPD-Link serial stream; provides synchronized 28-bit parallel output with falling-edge strobe. Use Value: Meets AEC-Q100 Grade 3 requirements and delivers 500 ps input skew margin to tolerate harness-induced jitter and interconnect skew in automotive wiring harnesses. |
Use Scenario: Connecting ARM-based HMI processor to 1080p industrial LCD panel in factory automation terminal. IC Role / Device Role / Timing Role: Converts serialized video from DS90C383B transmitter into parallel RGB+control signals with precise setup/hold timing for FPGA or ASIC video interface. Use Value: Enables single-cable video interface with EMI reduction versus parallel TTL buses, while maintaining 65 MHz throughput for smooth 60 Hz refresh. |
| Medical Imaging Display Interfaces | Avionics Multi-Function Displays |
|
Use Scenario: Transmitting diagnostic ultrasound or endoscopy video from imaging engine to high-brightness display in portable medical device. IC Role / Device Role / Timing Role: Deserializes FPD-Link video stream and regenerates clean TTL clock and data for display timing controller (TCON) with low jitter. Use Value: Delivers <142 mW typical power at 65 MHz grayscale, supporting fanless thermal design in sealed medical enclosures. |
Use Scenario: Video distribution from mission computer to cockpit MFD with strict EMI and reliability requirements. IC Role / Device Role / Timing Role: Receives hardened LVDS video link and outputs deterministic 28-bit parallel data with guaranteed setup/hold windows for safety-critical display rendering. Use Value: Provides >7 kV HBM ESD protection and validated −40°C to +85°C operation for avionics environmental compliance. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LVDS deserializer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS90CF564AMT/NOPB | 56-bit deserializer with dual-link support; higher channel count and 85 MHz max clock. | Targeted at WUXGA and dual-channel FPD-Link systems; not pin-compatible with DS90CF384AQMT/NOPB. | Select when scaling beyond 24-bit RGB or requiring dual-link capability for higher resolution. |
| SN65LVDS32PW | 4-channel LVDS receiver only; no PLL, no parallel output conversion, no clock recovery. | Suitable for point-to-point LVDS signal conditioning, not FPD-Link deserialization. | Choose only for basic LVDS signal integrity restoration - not as functional replacement for display link deserialization. |
Compared with DS90CF384AQMT/NOPB, DS90CF564AMT/NOPB offers expanded bandwidth and channel count but requires PCB redesign, while SN65LVDS32PW lacks clock recovery and parallel output logic - making neither a drop-in substitute, but both viable for adjacent system-level functions.
Availability
DS90CF384AQMT/NOPB is available at Aetrix Electronics and suitable for automotive instrument clusters, industrial HMIs, and medical display interfaces requiring stable component supply, AEC-Q100 compliance, and long-term lifecycle support.
Supply support for DS90CF384AQMT/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions with emphasis on automotive, industrial, and personal electronics markets.
The DS90CF384AQMT/NOPB belongs to TI's FPD-Link family, engineered specifically for high-speed, low-EMI video interconnect between graphics processors and flat-panel displays in harsh environments.
FAQ
What is the primary function of the DS90CF384AQMT/NOPB in a display system?
The DS90CF384AQMT/NOPB acts as an LVDS deserializer that recovers clock and data from a 4-lane FPD-Link serial interface and converts it into 28-bit parallel LVCMOS/LVTTL output - comprising 24-bit RGB and 4 video control signals. It enables high-speed, low-EMI video transmission between graphics controllers and TFT-LCD panels, and is integral to DS90CF384AQMT/NOPB-based display interfaces in automotive and industrial applications.
Does the DS90CF384AQMT/NOPB require external components for PLL operation?
No, the DS90CF384AQMT/NOPB integrates a fully self-contained PLL that locks to the incoming LVDS clock without requiring external capacitors, resistors, or crystal references. This simplifies design, reduces bill-of-materials cost, and improves manufacturing yield - a key feature confirmed in the SNLS345A datasheet for DS90CF384AQMT/NOPB.
What is the significance of the 50% duty cycle specification for DS90CF384AQMT/NOPB's RxCLK OUT?
The DS90CF384AQMT/NOPB guarantees a 50% ±10% duty cycle on its RxCLK OUT signal, which serves as the data strobe for latching parallel outputs. This balanced waveform minimizes timing uncertainty and maximizes setup/hold margin at the receiving logic - critical for reliable capture of 28-bit data at 65 MHz in DS90CF384AQMT/NOPB-based display timing chains.
How does the DS90CF384AQMT/NOPB support automotive qualification requirements?
The DS90CF384AQMT/NOPB is explicitly qualified to AEC-Q100 Grade 3 (−40°C to +85°C), features >7 kV HBM ESD protection, and undergoes automotive-specific reliability testing. Its dedicated PLL and LVDS supply domains, plus low-power shutdown mode, meet stringent automotive infotainment system requirements - all documented for DS90CF384AQMT/NOPB in TI's official production data.
Can the DS90CF384AQMT/NOPB be used with non-TI FPD-Link transmitters?
Yes - the DS90CF384AQMT/NOPB complies with the TIA/EIA-644 LVDS standard and is interoperable with any LVDS transmitter meeting FPD-Link timing and electrical specifications, including third-party or custom serializers. Its input skew margin (500 ps @ 65 MHz) and wide common-mode range (0–2.4 V) ensure robust link operation regardless of transmitter vendor - as verified in DS90CF384AQMT/NOPB characterization data.
DS90CF384AQMT/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 56-TFSOP (0.240", 6.10mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Applications:
- -
- Interface:
- -
- Voltage - Supply:
- 3V ~ 3.6V
- Supplier Device Package:
- 56-TSSOP
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
DS90CF384AQMT/NOPB FAQ
1.How can I place an order for DS90CF384AQMT/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for DS90CF384AQMT/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS90CF384AQMT/NOPB reliable?
The price and inventory of DS90CF384AQMT/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS90CF384AQMT/NOPB is usually 5 days.
3.What payment methods are accepted for DS90CF384AQMT/NOPB?
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4.How is shipping managed for DS90CF384AQMT/NOPB?
DS90CF384AQMT/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS90CF384AQMT/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS90CF384AQMT/NOPB?
For technical support, including DS90CF384AQMT/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS90CF384AQMT/NOPB requirements.
6.How does Aetrix verify that DS90CF384AQMT/NOPB is sourced from the original manufacturer or authorized distributors?
All DS90CF384AQMT/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS90CF384AQMT/NOPB meets industry standards.
7.What is the process for return or replacement of DS90CF384AQMT/NOPB?
All DS90CF384AQMT/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with DS90CF384AQMT/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS90CF384AQMT/NOPB part is unused and in its original packaging.
Return procedure for DS90CF384AQMT/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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