Texas Instruments DS90CF384MTD/NOPB

Overview

DS90CF384MTD/NOPB from Texas Instruments (formerly National Semiconductor) is a +3.3V LVDS receiver for 24-bit flat panel display (FPD) link applications, converting four LVDS data streams and one LVDS clock into 28-bit LVCMOS/LVTTL output (24 RGB + 3 control signals), supporting up to 65 MHz pixel clock and 455 Mbps per channel. It operates across −40°C to +85°C, features falling-edge data strobe output, and delivers <60 mA typical supply current at 65 MHz.

For engineers reviewing the DS90CF384MTD/NOPB datasheet, DS90CF384MTD/NOPB pinout, DS90CF384MTD/NOPB application, or DS90CF384MTD/NOPB equivalent, key selection criteria include LVDS-to-TTL conversion capability, FPD Link timing compatibility with DS90C383/DS90CF384 chipset, power-down mode (<55 µA), and TSSOP-56 package mechanical fit in display interface designs.

Technical Context

The DS90CF384MTD/NOPB implements a PLL-based LVDS receiver architecture synchronized to an incoming differential clock (RxCLK IN±), recovering 28 bits of parallel TTL data with precise internal sampling windows defined by RSPos timing parameters (e.g., RSPos0 = 0.7–1.4 ns at 65 MHz). Its falling-edge FPSHIFT OUT strobe aligns with DS90C383 transmitter variants configured for rising-edge input, enabling interoperability without translation logic.

It supports full 24-bit RGB + FPLINE/FPFRAME/DRDY timing signal reconstruction, maintains skew margin (RSKM = 400 ps at 65 MHz) to accommodate interconnect skew and jitter (<250 ps cycle-to-cycle), and integrates dedicated power domains (LVDS VCC, PLL VCC, TTL VCC) with separate ground planes for noise isolation in high-speed display links.

Key Specifications

Pinout & Package

DS90CF384MTD/NOPB uses a 56-lead TSSOP (MTD56) package with 1.27 mm pitch, 12.5 mm × 6.1 mm footprint, and JEDEC-standard thermal pad layout. Pin assignments are optimized for FPD Link signal grouping and power integrity, with dedicated VCC/GND sets for LVDS, PLL, and TTL domains.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LVDS receiver applications.

Compared with DS90CF584MTD and SN65LVDS32PW, DS90CF384MTD/NOPB uniquely combines 24-bit FPD Link protocol compliance, integrated falling-edge strobe, 3.3V operation, and sub-60 µA power-down-making it the sole qualified solution for space-constrained, low-power XGA display interfaces requiring direct TTL output.

Availability

DS90CF384MTD/NOPB is available at Aetrix Electronics and suitable for LCD monitor interface, industrial HMI display, medical diagnostic display, and avionics cabin display applications requiring stable component supply and long-term production continuity.

Supply support for DS90CF384MTD/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments acquired National Semiconductor in 2011 and maintains full technical and manufacturing continuity for its high-performance analog and interface portfolio.

The DS90CF384MTD/NOPB belongs to TI's Flat Panel Display Link (FPD-Link) product line, engineered specifically to replace wide parallel TTL buses in display interconnects with low-EMI, high-bandwidth LVDS serial links for consumer, industrial, and automotive displays.

FAQ

What is the primary function of the DS90CF384MTD/NOPB in an FPD Link system?

The DS90CF384MTD/NOPB functions as a +3.3V LVDS receiver that converts four differential LVDS data streams and one differential LVDS clock into 28-bit parallel LVCMOS/LVTTL output (24 RGB + 3 control signals). It reconstructs pixel and timing data for LCD timing controllers, delivering a falling-edge FPSHIFT OUT strobe synchronized to recovered data. This enables compact, low-EMI display interconnects in XGA and higher-resolution systems.

Does the DS90CF384MTD/NOPB require external components for PLL operation?

No, the DS90CF384MTD/NOPB integrates a fully self-contained PLL with no external components required. Its PLL locks to the incoming LVDS clock (RxCLK IN±) within ≤10 ms (RPLLS parameter), eliminating the need for external loop filter capacitors or resistors. This simplifies layout, reduces BOM count, and improves reliability in space-constrained display modules where the DS90CF384MTD/NOPB is deployed.

Can the DS90CF384MTD/NOPB interface directly with a 5V-tolerant LCD timing controller?

No, the DS90CF384MTD/NOPB outputs standard 3.3V TTL levels (VOH ≥ 2.7 V, VOL ≤ 0.3 V), not 5V-tolerant signals. It is not designed to drive 5V-input logic directly. If interfacing with a 5V-tolerant controller, level-shifting circuitry or a compatible 3.3V-input timing controller must be used. The DS90CF384MTD/NOPB datasheet specifies absolute maximum input voltage of (VCC + 0.3 V) = 3.9 V, confirming no 5V tolerance.

What is the significance of the 400 ps skew margin (RSKM) specified for DS90CF384MTD/NOPB?

The 400 ps skew margin (RSKM) for DS90CF384MTD/NOPB defines the guaranteed timing window within which valid data can be sampled at the receiver inputs, accounting for transmitter pulse position variation, interconnect skew (10–40 ps/ft), inter-symbol interference, and clock jitter (<250 ps). This margin ensures robust 65 MHz operation across real-world cable lengths and environmental conditions, directly impacting display pixel accuracy and flicker-free performance in systems using DS90CF384MTD/NOPB.

How does the power-down mode of DS90CF384MTD/NOPB operate, and what is its current draw?

When the PWR DOWN pin is asserted low, the DS90CF384MTD/NOPB enters power-down mode: all RxOUT pins are tri-stated, internal PLL and receiver circuits are disabled, and total supply current drops to ≤55 µA (ICCRZ parameter). This mode enables zero-power standby during display blanking or system sleep states. Recovery time is ≤1 µs (RPDD), allowing rapid reactivation without disrupting upstream video sources-critical for responsive user interfaces using DS90CF384MTD/NOPB.