Texas Instruments DS90CF564MTD/NOPB

Overview

DS90CF564MTD/NOPB from Texas Instruments is a 18-bit color FPD-Link LVDS receiver IC that converts three LVDS data streams and one LVDS clock into 21-bit CMOS/TTL parallel output (6R/6G/6B + 3 control), supporting up to 65 MHz pixel clock and 171 Mbytes/s throughput for XGA (1024×768) flat-panel displays. It operates at 5.0 V, features <67 mA typical supply current at 65 MHz, and includes power-down mode drawing <10 μA.

For engineers reviewing the DS90CF564MTD/NOPB datasheet, DS90CF564MTD/NOPB pinout, DS90CF564MTD/NOPB application, or DS90CF564MTD/NOPB equivalent, key selection criteria include LVDS input skew margin (600 ps), falling-edge data strobe timing, TSSOP-48 package compatibility, and compliance with TIA/EIA-644 LVDS standard.

Technical Context

The DS90CF564MTD/NOPB implements a PLL-based LVDS-to-CMOS/TTL conversion architecture with internal clock recovery, requiring no external loop filter components. Its receiver synchronizes to the incoming LVDS clock (RxCLK IN±) and reconstructs 21-bit parallel outputs aligned to FPSHIFT OUT's falling edge.

It supports worst-case pattern operation at 65 MHz with 110–140 mA supply current, offers 600 ps LVDS input skew margin to accommodate cable-induced skew and source jitter, and maintains valid sampling across temperature (−10°C to +70°C) and supply (4.75–5.25 V) variations.

Key Specifications

Pinout & Package

DS90CF564MTD/NOPB uses a 48-pin TSSOP package (DGG0048A), 12.6 mm × 6.2 mm × 1.2 mm max height, RoHS-compliant with Sn lead finish and MSL Level-2 rating.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LVDS deserializer applications.

Compared with SN65LVDS93AIPWPR and THS8200IPHP, DS90CF564MTD/NOPB delivers optimal balance of XGA timing fidelity, ultra-low standby power, and minimal external component count-making it the preferred choice for cost- and space-constrained commercial display interfaces where 65 MHz bandwidth suffices.

Availability

DS90CF564MTD/NOPB is available at Aetrix Electronics and suitable for industrial HMIs, medical monitors, avionics cabin displays, and retail kiosk systems requiring stable component supply and long-term production continuity.

Supply support for DS90CF564MTD/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with decades of expertise in high-speed interface solutions.

The DS90CF564MTD/NOPB belongs to TI's FPD-Link family, engineered specifically to replace wide parallel TTL interfaces in flat-panel display systems with robust, low-EMI LVDS serial links.

FAQ

What is the maximum supported pixel clock frequency for DS90CF564MTD/NOPB?

The DS90CF564MTD/NOPB supports a maximum pixel clock frequency of 65 MHz, enabling single-pixel-per-clock timing for XGA (1024×768) resolution at 60 Hz refresh rate. At this frequency, the device achieves 171 Mbytes/s throughput across its 21-bit parallel output bus, with verified timing margins per the SNLS107E datasheet switching characteristics table.

Does DS90CF564MTD/NOPB require external components for PLL operation?

No, DS90CF564MTD/NOPB requires no external components for PLL operation. Its internal PLL locks to the incoming LVDS clock (RxCLK IN±) and generates stable output timing without external capacitors or resistors-reducing bill-of-materials cost and improving reliability across temperature and voltage variations.

How does the power-down mode function on DS90CF564MTD/NOPB?

When PWR DOWN is asserted low, DS90CF564MTD/NOPB enters power-down mode, reducing supply current to less than 10 μA while holding all 21 CMOS/TTL outputs (RxOUT0–RxOUT20) in their last valid logic states. This prevents bus contention and preserves display frame integrity during sleep cycles without requiring external latches or level shifters.

What is the LVDS input common-mode voltage range for DS90CF564MTD/NOPB?

The DS90CF564MTD/NOPB accepts LVDS input common-mode voltages from 1.1 V to 1.37 V, compliant with the TIA/EIA-644 standard. This range ensures interoperability with TI's DS90CF563 transmitter and other LVDS sources operating at nominal 1.2 V common-mode, even under supply and temperature variation.

Can DS90CF564MTD/NOPB be used with non-TI LVDS transmitters?

Yes, DS90CF564MTD/NOPB is compatible with any LVDS transmitter meeting TIA/EIA-644 electrical specifications-including differential output voltage (250–450 mV), common-mode range (1.1–1.37 V), and slew rate-provided the transmitter delivers three 7-bit data lanes plus one clock lane synchronized to the same pixel clock. Timing validation against setup/hold windows is recommended for third-party sources.