Texas Instruments DS90CP04TLQX

Overview

DS90CP04TLQX from Texas Instruments is a 4×4 non-blocking LVDS crosspoint switch with fully differential 1.5 Gbps data paths, 2.5 V single-supply operation, and serial/parallel digital control interface. It routes any of four differential LVDS inputs to any of four differential LVDS outputs, supporting broadcast, redundancy, and broadside configurations in high-speed serial link routing for FPGA-to-FPGA interconnects and video backplanes.

For engineers reviewing the DS90CP04TLQX datasheet, DS90CP04TLQX pinout, DS90CP04TLQX application, or DS90CP04TLQX equivalent, this page delivers verified electrical specs, validated package mapping, confirmed pin functions, real-world timing behavior (tPLHD ≤ 1200 ps, tJIT ≤ 40 ps_p-p at 1.5 Gb/s), and two production-validated alternative parts with documented functional trade-offs.

Technical Context

The DS90CP04TLQX implements a fully differential, non-blocking 4×4 switch matrix composed of four independent 4:1 LVDS multiplexers - each output channel (OUT1±–OUT4±) connects to one of IN1±–IN4± under digital control. Its architecture supports simultaneous configuration updates via LOAD-triggered register transfer and enables cascaded programming across multi-device arrays using RSCLK/RSO (row) and CSCLK/CSO (column) replication.

Control is implemented via dual-mode interface: MODE = 1 enables parallel SEL0/SEL1 configuration select (four fixed routing modes), while MODE = 0 activates the 30-bit serial interface (SCLK/SI) with read-back capability and addressable row/column targeting for scalable matrix deployment. All LVDS I/O meets ANSI TIA/EIA-644-A with VID ≥ 100 mV and VOD = 250–475 mV into 100 Ω.

Key Specifications

Pinout & Package

DS90CP04TLQX is housed in a 6 mm × 6 mm WQFN-32 package with 0.5 mm pitch and exposed thermal pad (DAP = GND). The package supports high-density PCB layout with broadside I/O pin arrangement - inputs on left/right edges, outputs on top/bottom - minimizing trace crossovers and stub length in high-speed routing.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LVDS crosspoint switch applications.

Compared with DS90CP04TLQX, MAX9156ESE+ offers simpler integration for static routing but sacrifices reconfigurability, while SN65LVCP22RGZR provides higher bandwidth in a smaller footprint but cannot replicate the 4-output broadcast or redundancy functionality essential for video and fault-tolerant systems.

Availability

DS90CP04TLQX is available at Aetrix Electronics and suitable for high-speed video backplanes, FPGA interconnects, redundant serial links, and broadcast clock distribution requiring stable component supply across long-lifecycle industrial and aerospace programs.

Supply support for DS90CP04TLQX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and high-speed interface solutions, with decades of expertise in LVDS, SerDes, and signal-integrity-critical IC design.

The DS90CP04TLQX belongs to TI's high-speed interface portfolio designed specifically for reconfigurable, low-jitter physical-layer routing in multi-gigabit serial communication systems - emphasizing deterministic timing, noise immunity, and scalable system integration.

FAQ

What is the maximum supported data rate for DS90CP04TLQX?

The DS90CP04TLQX is characterized and specified for DC to 1.5 Gbps operation. Electrical specifications including jitter (10–40 ps_p-p for K28.5 pattern), propagation delay (500–1200 ps), and transition time (100–160 ps) are guaranteed across this range. While some units may function beyond 1.5 Gbps, TI does not guarantee performance above this rated limit, and system validation is required for >1.5 Gbps use cases.

Does DS90CP04TLQX support both serial and parallel configuration modes?

Yes, DS90CP04TLQX supports dual configuration modes selected by the MODE pin. With MODE = 1, it uses parallel control via SEL0 and SEL1 pins for four predefined routing modes (distribution, redundancy, broadside). With MODE = 0, it activates the 30-bit serial interface using SCLK and SI, enabling dynamic, addressable, and read-back-capable programming - ideal for large crosspoint arrays.

What is the purpose of the CSO/CSCLK and RSO/RSCLK pins on DS90CP04TLQX?

The CSO/CSCLK and RSO/RSCLK pins enable cascaded programming in multi-device matrices. CSO/CSCLK propagate control data down the column (decrementing row address), while RSO/RSCLK propagate it across the row (decrementing column address). This allows full configuration of an NxN array using only one SCLK/SI bus - eliminating the need for separate control lines per device.

Can DS90CP04TLQX outputs be individually disabled?

No, DS90CP04TLQX does not provide per-output enable/disable control (e.g., EN1–EN4 pins). However, all four LVDS outputs can be placed into TRI-STATE simultaneously via serial command or parallel mode selection. The device supports full output disable - useful for hot-swap, power gating, or bus isolation - but not independent channel shutdown.

What package type and thermal characteristics does DS90CP04TLQX have?

DS90CP04TLQX uses a 6 mm × 6 mm WQFN-32 package (NJE0032A) with 0.5 mm pitch and an exposed thermal pad (DAP) electrically and thermally connected to GND. Its thermal resistance is θ_JA = 26.4°C/W, and it requires ≥4 vias from DAP to the PCB ground plane. Maximum power dissipation is 3200 mW at 25°C, derated by 38 mW/°C above ambient.