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Texas Instruments DS90CP04TLQX/NOPB
- Part No.:
- DS90CP04TLQX/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 32-WFQFN Exposed Pad
- Datasheet:
-
DS90CP04TLQX/NOPB.pdf
- Description:
- IC CROSSPOINT SW 1 X 4:4 32WQFN
- Quantity:
- Payment:
- Shipping:
Inventory:2,240
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Product details
Overview
DS90CP04TLQX/NOPB from Texas Instruments is a 4×4 non-blocking LVDS crosspoint switch enabling any of four differential inputs (IN1±–IN4±) to be routed to any of four differential outputs (OUT1±–OUT4±) at up to 1.5 Gbps, with <2.5 psRMS jitter and <50 ps channel-to-channel skew. It operates from a single +2.5 V supply and supports TRI-STATE outputs for bus sharing in high-speed serial interconnects such as camera links and FPGA I/O expansion.
For engineers reviewing the DS90CP04TLQX/NOPB datasheet, DS90CP04TLQX/NOPB pinout, DS90CP04TLQX/NOPB application, or DS90CP04TLQX/NOPB equivalent, this page delivers verified functional architecture, validated serial control timing, confirmed WQFN-32 package mapping, and real-world switching use cases in LVDS-based video and data routing systems.
Technical Context
The DS90CP04TLQX/NOPB implements a fully differential, non-blocking 4×4 matrix using four independent 4:1 LVDS multiplexers - each output connects to one of the four common inputs. Its digital control interface supports both serial programming (30-bit frame with row/column addressing and per-output routing selection) and parallel configuration via SEL0/SEL1 pins.
Two distinct control modes are hardware-selectable: MODE = low enables SCLK-driven serial register loading with cascading support (RSO/RSCLK, CSO/CSCLK); MODE = high activates pin-strapped broadcast modes (Distribution, Redundancy, Broadside). All LVDS paths maintain DC-coupled, low-skew signal integrity with 100–475 mV differential output swing and 0.05–3.25 V input common-mode range.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Switch Architecture | 4×4 non-blocking LVDS crosspoint with four independent 4:1 MUXes; any input → any output routing |
| Max Data Rate | 1.5 Gbps per channel - supports 1080p60 video, Camera Link Base, and FPGA-to-FPGA serial links |
| Jitter Performance | 1.6–2.5 psRMS (750 MHz–1.25 GHz), ≤40 psP-P (K28.5 pattern @1.5 Gb/s) - ensures clean eye opening at high BER thresholds |
| Supply Voltage | +2.5 V ±5% - compatible with standard LVDS logic rails and eliminates need for dual supplies |
| Output Skew | ≤50 ps max channel-to-channel skew in Broadcast mode - preserves timing alignment across multiple outputs |
| Control Interface | Serial (SCLK/SI/LOAD/CSO/RSO) or parallel (SEL0/SEL1/MODE) - enables flexible system-level configuration without FPGA GPIO overhead |
| Package | WQFN-32 (6 mm × 6 mm, 0.5 mm pitch, 0.75 mm height) with exposed DAP grounded to PCB - optimized for thermal dissipation and high-density layout |
Pinout & Package
DS90CP04TLQX/NOPB uses a 32-pin WQFN package (package code NJE0032A) with 0.5 mm pitch, 6 mm × 6 mm body, and exposed thermal pad (DAP) tied to GND. Pin 1 is top-left corner (marked), and DAP must be connected to ground plane via ≥4 vias for optimal thermal and AC performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN1+ / IN1− to IN4+ / IN4− | Differential LVDS Inputs | Four bidirectional, fully differential input pairs shared across all MUXes; accept LVDS/LVPECL/2.5V-CML signals |
| OUT1+ / OUT1− to OUT4+ / OUT4− | Differential LVDS Outputs | Four TRI-STATEable LVDS outputs; each independently configurable to connect to any input pair |
| SCLK, SI/SEL1, SEL0, LOAD, MODE | LVCMOS Control Inputs | Serial clock, data, address, load strobe, and mode select - operate at 0–100 MHz with 1.5 ns setup/hold |
| CSO, RSO, CSCLK, RSCLK | LVCMOS Cascading Outputs | Replicated serial interface outputs for daisy-chaining arrays; enable single-bus programming of multi-device matrices |
| VDD (Pins 1, 8, 17, 24) | Power Supply | +2.5 V supply requiring ≥4 × 0.01 µF low-ESR bypass capacitors near each VDD pin |
| GND (Pins 4, 20, 21, 24) | Ground Reference | Common return for LVDS analog core and CMOS digital control; DAP is primary GND connection |
Key Features
| Feature | Design Value |
|---|---|
| DC–1.5 Gbps operation | Validated over full temperature range (−40°C to +85°C); supports legacy and next-gen serial protocols without retiming |
| TRI-STATE LVDS outputs | Enables time-multiplexed sharing of differential buses; tOFF ≤ 5 ns ensures fast bus release |
| Double-register loading | Separate load register and configuration register prevent partial updates; new routing takes effect only after LOAD pulse |
| Read-back capability | Serial interface supports configuration verification via 30-bit read frame - critical for fault-tolerant systems |
| Row/column cascading | CSO/CSCLK and RSO/RSCLK allow scalable NxN matrix expansion with single SCLK/SI bus and synchronized LOAD |
Applications
| Camera Link Routing | FPGA I/O Expansion |
|---|---|
Use Scenario: Reconfigurable routing of multiple camera sensors to a single image processor in machine vision systems. IC Role / Device Role / Timing Role: Crosspoint switch dynamically assigns sensor streams (IN1±–IN4±) to processor lanes (OUT1±–OUT4±) without physical rework. Use Value: Enables field-upgradable multi-sensor configurations with sub-150 ns reconfiguration latency and <50 ps skew across all four outputs. |
Use Scenario: Aggregating high-speed transceiver lanes from multiple FPGAs into a centralized SerDes bank or backplane interface. IC Role / Device Role / Timing Role: LVDS crosspoint provides protocol-agnostic lane remapping between heterogeneous FPGA I/O banks and fixed PHY resources. Use Value: Eliminates need for custom PCB revisions when changing FPGA pinouts; maintains <2.5 psRMS jitter for PCIe Gen2-equivalent signaling. |
| Redundant Video Distribution | Test Equipment Signal Switching |
Use Scenario: Dual-path video transmission in medical imaging or broadcast gear where failover must preserve signal integrity. IC Role / Device Role / Timing Role: Configured in Redundancy mode (SEL0=1, SEL1=1) to route IN1± to OUT1±/OUT2± and IN3± to OUT3±/OUT4± simultaneously. Use Value: Achieves seamless switchover with zero packet loss and <300 ns output enable time (tON) - no visible glitch on display. |
Use Scenario: Automated test equipment requiring dynamic reconfiguration of high-speed differential stimulus/response paths. IC Role / Device Role / Timing Role: Crosspoint serves as programmable interconnect between arbitrary DUT ports and instrument channels under microcontroller control. Use Value: Reduces fixture complexity by replacing mechanical relays; supports 1.5 Gbps bit-error-free switching with <100 ps propagation delay variation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LVDS crosspoint switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX9156ETJ+ | 3×3 LVDS crosspoint; 1.0 Gbps max rate; no serial interface; only pin-strapped configuration | Limited to smaller channel counts and static routing; lacks cascading or read-back capability | Choose for cost-sensitive, fixed-configuration 3×3 applications where serial control is unnecessary. |
| SN65LVDS387DGGR | 4×4 LVDS repeater/crosspoint with integrated equalization; 2.0 Gbps; requires external configuration EEPROM | Supports longer trace lengths via equalization but adds BOM complexity and boot-time dependency | Choose when driving >30 cm FR4 traces at >1.25 Gbps; avoid if board space or startup timing is constrained. |
Compared with MAX9156ETJ+ and SN65LVDS387DGGR, DS90CP04TLQX/NOPB uniquely balances 4×4 flexibility, 1.5 Gbps performance, embedded serial control with read-back, and WQFN-32 compactness - making it optimal for reconfigurable, medium-scale LVDS interconnects where reliability and debuggability matter.
Availability
DS90CP04TLQX/NOPB is available at Aetrix Electronics and suitable for camera link routing, FPGA I/O expansion, redundant video distribution, and automated test equipment requiring stable component supply and long-term industrial availability.
Supply support for DS90CP04TLQX/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and high-speed interface solutions for industrial, automotive, and communications markets.
The DS90CP04TLQX/NOPB belongs to TI's high-speed LVDS interface portfolio, designed specifically for reconfigurable, low-jitter serial interconnects in vision systems, test instrumentation, and FPGA-based platforms.
FAQ
What is the maximum supported data rate for DS90CP04TLQX/NOPB?
The DS90CP04TLQX/NOPB is characterized and specified for reliable operation up to 1.5 Gbps per channel across the full industrial temperature range (−40°C to +85°C), with jitter and skew performance validated at this rate using K28.5 and PRBS23 patterns. It supports lower rates including 200 Mb/s and 1.25 Gb/s with tighter timing margins.
Does DS90CP04TLQX/NOPB support read-back of its current switch configuration?
Yes, DS90CP04TLQX/NOPB supports full read-back via its serial interface: sending a 30-bit "Read" frame (start code 011110b) causes the device to shift out its current configuration register contents on RSO and CSO. This enables runtime verification and fault diagnostics without requiring external memory or host-side state tracking.
How does the MODE pin affect DS90CP04TLQX/NOPB operation?
When MODE = low, DS90CP04TLQX/NOPB enables serial control mode: SCLK drives internal registers, and CSO/RSO/CSCLK/RSCLK become active for cascading. When MODE = high, serial control is disabled and pin-strapped configuration (via SEL0/SEL1) selects one of four fixed routing modes: Distribution, Redundancy, or Broadside - simplifying integration in static systems.
What is the purpose of the DAP (exposed thermal pad) on DS90CP04TLQX/NOPB?
The DAP on DS90CP04TLQX/NOPB is the primary ground connection for both thermal and electrical performance. It must be soldered to the PCB ground plane using at least four thermal vias. Proper DAP grounding reduces θJA to 26.4°C/W, stabilizes LVDS common-mode voltage, and minimizes noise coupling into high-speed differential paths.
Can DS90CP04TLQX/NOPB interface directly with LVPECL or CML drivers?
Yes, DS90CP04TLQX/NOPB accepts input common-mode voltages from 0.05 V to 3.25 V and differential swings down to 100 mV, making it compatible with LVPECL (with appropriate termination) and 2.5 V CML sources. No level-shifting circuitry is required - the inputs are internally biased and fully differential.
DS90CP04TLQX/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 32-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Crosspoint Switch
- Circuit:
- 1 x 4:4
- Independent Circuits:
- 1
- Current - Output High, Low:
- -
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 2.375V ~ 2.625V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-WQFN (6x6)
DS90CP04TLQX/NOPB FAQ
1.How can I place an order for DS90CP04TLQX/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for DS90CP04TLQX/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS90CP04TLQX/NOPB reliable?
The price and inventory of DS90CP04TLQX/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS90CP04TLQX/NOPB is usually 5 days.
3.What payment methods are accepted for DS90CP04TLQX/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS90CP04TLQX/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS90CP04TLQX/NOPB?
DS90CP04TLQX/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS90CP04TLQX/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS90CP04TLQX/NOPB?
For technical support, including DS90CP04TLQX/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS90CP04TLQX/NOPB requirements.
6.How does Aetrix verify that DS90CP04TLQX/NOPB is sourced from the original manufacturer or authorized distributors?
All DS90CP04TLQX/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS90CP04TLQX/NOPB meets industry standards.
7.What is the process for return or replacement of DS90CP04TLQX/NOPB?
All DS90CP04TLQX/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with DS90CP04TLQX/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS90CP04TLQX/NOPB part is unused and in its original packaging.
Return procedure for DS90CP04TLQX/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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