Texas Instruments DS90CP22M-8-TI
- Part No.:
- DS90CP22M-8-TI
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
DS90CP22M-8-TI.pdf
- Description:
- CROSS POINT SWITCH, 1 FUNC, 2 CH
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
DS90CP22M-8-TI from Texas Instruments is a 2×2 LVDS crosspoint switch IC designed for high-speed serial interconnect routing in backplane and board-level applications. It operates at DC to 800 Mbps with 65 ps (typ) peak-to-peak jitter, 35 ps (typ) output channel-to-channel skew, and supports 1:2 splitter, 2:1 mux, repeater, and switch modes under a single +3.3 V supply. It is used in fault-tolerant telecom and datacom systems requiring low-skew signal distribution.
For engineers reviewing the DS90CP22M-8-TI datasheet, DS90CP22M-8-TI pinout, DS90CP22M-8-TI application, or DS90CP22M-8-TI equivalent, key selection criteria include LVDS/LVPECL input compatibility, TRI-STATE enable control, sub-1.3 ns propagation delay, <330 mW power dissipation, and SOIC-16 package suitability for space-constrained PCB layouts.
Technical Context
The DS90CP22M-8-TI implements a non-blocking analog switch matrix with fully differential LVDS signal paths from input to output, preserving signal integrity via balanced output impedance and low pulse width distortion. Its internal architecture supports four configurable modes-1:2 splitter, repeater, crosspoint switch, and 2:1 mux-determined by dual SEL inputs per Table 1 of SNLS053E.
Each LVDS receiver accepts differential inputs with ±100 mV threshold and supports common-mode voltage range from 0.05 V to 3.25 V; outputs drive 75 Ω or 100 Ω loads with 285–440 mV differential voltage and 1.0–1.45 V offset voltage. Enable pins (EN0/EN1) independently place each output pair into TRI-STATE, reducing supply current from 125 mA (active) to 55 mA (TRI-STATE).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Max Data Rate | 800 Mbps - enables high-bandwidth serial links such as Gigabit Ethernet PHY interfaces and FPGA-to-FPGA interconnects |
| Jitter (Pk-Pk) | 65 ps (typ) at 800 Mbps with PRBS=2²³−1 - ensures reliable bit error rate performance in timing-critical backplane applications |
| Propagation Delay | 1.3 ns (typ) - supports tight timing budgets in multi-stage LVDS fan-out or repeater chains |
| Output Skew | 35 ps (typ) channel-to-channel - maintains phase alignment across parallel data lanes in DDR or parallel bus extensions |
| Supply Voltage | +3.3 V (3.0–3.6 V range) - compatible with standard LVDS logic domains and eliminates need for level-shifting circuitry |
| Power Dissipation | 330 mW (typ) - allows thermal management in dense board layouts without forced air or heatsinking |
| Operating Temp | −40°C to +85°C - qualified for industrial and telecom infrastructure environments |
Pinout & Package
DS90CP22M-8-TI is packaged in a 16-pin SOIC (Package Drawing D), 7.5 mm × 10.3 mm body size, 1.75 mm height, RoHS-compliant, with moisture sensitivity level (MSL) Level-1 (UNLIM).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN0+, IN0− | LVDS Input Pair 0 | Differential data path A; accepts LVDS, LVPECL, or attenuated PECL signals |
| IN1+, IN1− | LVDS Input Pair 1 | Differential data path B; independent of IN0, enabling true 2×2 switching |
| OUT0+, OUT0− | LVDS Output Pair 0 | Configurable output driven by selected input; supports TRI-STATE via EN0 |
| OUT1+, OUT1− | LVDS Output Pair 1 | Independent output path; can mirror OUT0 (splitter mode) or carry different signal (repeater/switch) |
| SEL0, SEL1 | Mode Select Inputs | CMOS/TTL control lines defining function per Table 1: 00=1:2 splitter (IN0→both), 01=repeater (IN0→OUT0, IN1→OUT1), etc. |
| EN0, EN1 | Output Enable Inputs | Active-High enables; drives respective output pair to high-impedance when low, reducing system power and enabling bus sharing |
| VCC, GND | Power & Ground | Single 3.3 V supply rail; requires local 0.01–0.1 µF RF bypassing per pin per TI layout guidelines |
| NC | No Connect | Two unconnected pins; must remain floating or grounded per PCB design rules-no internal connection |
Key Features
| Feature | Design Value |
|---|---|
| Non-blocking 2×2 Switch Architecture | Enables any input to connect to any output simultaneously-critical for redundant path switching in carrier-grade systems |
| LVPECL-Compatible Inputs | Accepts LVPECL directly without external termination or level shifters, simplifying interface to ECL-family transceivers |
| Configurable Operating Modes | Four distinct functions (splitter/mux/repeater/switch) controlled via two digital select lines-reduces BOM count vs. discrete solutions |
| Fast Switch Time | 1.2 ns (typ) transition between modes-supports dynamic reconfiguration during live link operation |
| TRI-STATE Output Control | Independent enable per output pair minimizes crosstalk and allows time-multiplexed sharing of downstream traces or receivers |
Applications
| Telecom Backplane Signal Routing | Fault-Tolerant Redundancy Switching |
|---|---|
Use Scenario: Distributing high-speed serial data across multiple line cards in a modular chassis using a shared backplane. IC Role / Device Role / Timing Role: LVDS crosspoint switch providing low-jitter, low-skew signal replication and path selection between upstream processors and downstream I/O modules. Use Value: Enables 800 Mbps link integrity across 10+ inch FR4 traces while maintaining <65 ps jitter-meeting SONET OC-48 and CPRI v6 timing budgets. | Use Scenario: Automatic failover between primary and backup data paths in mission-critical network switches or base station controllers. IC Role / Device Role / Timing Role: 2:1 multiplexer selecting active signal source; SEL inputs driven by health-monitoring logic to switch within 1.2 ns upon fault detection. Use Value: Eliminates manual reconfiguration and preserves sub-nanosecond timing alignment during switchover-preventing packet loss or frame sync loss. |
| LVDS Fan-Out for FPGA I/O Expansion | Multi-Drop LVDS Bus Driving |
Use Scenario: Expanding a single high-speed FPGA LVDS transmitter to drive three or more receivers on separate PCBs. IC Role / Device Role / Timing Role: 1:2 signal splitter replicating one input to two matched outputs with 35 ps max skew between channels. Use Value: Maintains deterministic inter-lane skew for parallel DDRx or JESD204B lane groups-enabling synchronous sampling across distributed ADC/DAC arrays. | Use Scenario: Driving multiple LVDS receivers from a single source over a shared backplane trace with reduced impedance loading. IC Role / Device Role / Timing Role: LVDS driver optimized for 75 Ω termination, delivering 365 mV differential swing into 75 Ω-improving signal fidelity in multidrop topologies. Use Value: Reduces reflection-induced jitter by better matching effective line impedance (~70–75 Ω) versus standard 100 Ω drivers-extending usable trace length by >30%. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LVDS crosspoint switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX9150ESE+ | Single 3.3 V supply; 600 Mbps max rate; 100 ps jitter (typ); SOIC-16 package | Limited to 600 Mbps and higher jitter-unsuitable for 800 Mbps CPRI or 10G-KR derivative links | Select DS90CP22M-8-TI when 800 Mbps operation and <70 ps jitter are required; MAX9150ESE+ only where cost sensitivity outweighs speed/jitter needs |
| SN65LVDS22DR | 2×2 LVDS repeater only (no mux/splitter modes); 800 Mbps; 85 ps jitter (typ); same SOIC-16 footprint | Fixed repeater function-lacks SEL-controlled mode flexibility and cannot perform 2:1 mux or 1:2 split | Choose DS90CP22M-8-TI for systems requiring runtime reconfiguration; SN65LVDS22DR fits static point-to-point buffer roles only |
Compared with MAX9150ESE+ and SN65LVDS22DR, DS90CP22M-8-TI uniquely delivers 800 Mbps operation with 65 ps jitter *and* full mode configurability (splitter/mux/repeater/switch) in a pin-compatible SOIC-16 package-making it the only option supporting both high-speed integrity and functional adaptability in compact industrial designs.
Availability
DS90CP22M-8-TI is available at Aetrix Electronics and suitable for telecom backplane routing, fault-tolerant redundancy switching, FPGA I/O expansion, multi-drop LVDS bus driving, and high-speed repeater applications requiring stable component supply across extended production lifecycles.
Supply support for DS90CP22M-8-TI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and high-performance signal chain technologies with over 90 years of innovation in industrial, automotive, and communications markets.
The DS90CP22M-8-TI belongs to TI's high-speed interface portfolio, engineered specifically for low-jitter, low-power LVDS signal routing in telecom infrastructure, test equipment, and programmable logic interconnect-addressing demand for deterministic timing in 5G fronthaul and edge compute systems.
FAQ
What is the maximum supported data rate for DS90CP22M-8-TI?
The DS90CP22M-8-TI supports up to 800 Mbps per channel, verified per the SNLS053E datasheet AC characteristics table under TJIT and TPLHD conditions at 3.3 V and 25°C. This rate is sustained with 65 ps (typ) peak-to-peak jitter using a PRBS=2²³−1 pattern, making DS90CP22M-8-TI suitable for CPRI v6, JESD204B subclass 1, and Gigabit Ethernet PHY interconnects.
Does DS90CP22M-8-TI support LVPECL input signals without external components?
Yes, DS90CP22M-8-TI LVDS receivers accept LVPECL signals directly, as confirmed in the "DESCRIPTION" section and Electrical Characteristics table of SNLS053E. The input threshold is <±100 mV, and common-mode range extends to +3.25 V, allowing direct connection to +3.3 V LVPECL sources without resistive termination or level-shifting circuitry.
How many operating modes does DS90CP22M-8-TI support, and how are they selected?
DS90CP22M-8-TI supports four operating modes-1:2 splitter, repeater, crosspoint switch, and 2:1 mux-as defined by the SEL0 and SEL1 control inputs per Table 1 in SNLS053E. Mode selection is static or dynamic via CMOS/TTL logic levels; for example, SEL0=0/SEL1=0 configures 1:2 splitter (IN0 routed to both outputs), while SEL0=1/SEL1=0 enables crosspoint (IN1→OUT0, IN0→OUT1).
What is the typical power consumption of DS90CP22M-8-TI in active operation?
DS90CP22M-8-TI consumes 125 mA (typ) total supply current under active conditions (EN0=EN1=High, RL=75 Ω, CL=5 pF), equating to ~330 mW at 3.3 V. In TRI-STATE mode (EN0=EN1=Low), supply current drops to 55 mA (typ), reducing power to ~180 mW-enabling dynamic power gating in burst-mode systems.
Is DS90CP22M-8-TI available in a RoHS-compliant package?
Yes, DS90CP22M-8-TI is offered in RoHS-compliant and green (low-halogen) variants, including DS90CP22M-8/NOPB (SOIC-16) and DS90CP22MX-8/NOPB (SOIC-16, tape-and-reel). Both meet EU RoHS requirements for all 10 substances and carry MSL Level-1 rating per JEDEC J-STD-020, with SN lead finish and unlimited floor life.
DS90CP22M-8-TI Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Bulk
- Product Status:
- Active
- Type:
- Crosspoint Switch
- Circuit:
- 1 x 2:2
- Independent Circuits:
- 1
- Current - Output High, Low:
- -
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 3V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
DS90CP22M-8-TI FAQ
1.How can I place an order for DS90CP22M-8-TI through Aetrix?
Please submit a Request for Quotation (RFQ) for DS90CP22M-8-TI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS90CP22M-8-TI reliable?
The price and inventory of DS90CP22M-8-TI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS90CP22M-8-TI is usually 5 days.
3.What payment methods are accepted for DS90CP22M-8-TI?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS90CP22M-8-TI transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS90CP22M-8-TI?
DS90CP22M-8-TI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS90CP22M-8-TI order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS90CP22M-8-TI?
For technical support, including DS90CP22M-8-TI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS90CP22M-8-TI requirements.
6.How does Aetrix verify that DS90CP22M-8-TI is sourced from the original manufacturer or authorized distributors?
All DS90CP22M-8-TI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS90CP22M-8-TI meets industry standards.
7.What is the process for return or replacement of DS90CP22M-8-TI?
All DS90CP22M-8-TI units undergo pre-shipment inspection (PSI). If there is an issue with DS90CP22M-8-TI, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS90CP22M-8-TI part is unused and in its original packaging.
Return procedure for DS90CP22M-8-TI:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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