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Home > Products > Integrated Circuits (ICs) > Logic > Signal Switches, Multiplexers, Decoders

Texas Instruments DS90CP22MT

Name: DS90CP22MT
Brand: Texas Instruments
SKU: DS90CP22MT
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: DS90CP22MT

Manufacturer:: Texas Instruments

Category:: Signal Switches, Multiplexers, Decoders

Package:: 16-TSSOP (0.173", 4.40mm Width)

Datasheet:: DS90CP22MT.pdf

Description:: IC CROSSPOINT SW 1 X 2:2 16TSSOP

Quantity:: RFQ Add To RFQ list

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Product details

Overview

DS90CP22MT from Texas Instruments is a 2×2 LVDS crosspoint switch IC designed for high-speed serial interconnect routing in backplane, rack-mounted, and fault-tolerant systems. It supports DC–800 Mbps operation with 65 ps (typ) peak-to-peak jitter, 35 ps (typ) output channel-to-channel skew, and operates from a single +3.3 V supply. Its non-blocking architecture enables dynamic reconfiguration as a 2:1 mux, 1:2 demux, repeater, or signal splitter in telecom and industrial data links.

For engineers reviewing the DS90CP22MT datasheet, DS90CP22MT pinout, DS90CP22MT application, or DS90CP22MT equivalent, key selection criteria include its LVDS/LVPECL-compatible inputs, TRI-STATE enable control per output, fast 1.2 ns (typ) switch time, and TSSOP-16 package compatibility with high-density PCB layouts.

Technical Context

The DS90CP22MT implements a fully differential LVDS signal path from input to output, eliminating pulse width distortion and enabling low-noise, high-fidelity transmission up to 800 Mbps. Its internal function table uses two SEL pins to configure four operating modes: 1:2 splitter (SEL0=SEL1=0 or 1), repeater (SEL0=0, SEL1=1), or crosspoint switch (SEL0=1, SEL1=0).

Each LVDS receiver accepts LVDS or LVPECL signals directly; unused inputs require external 10 kΩ pull-up/pull-down biasing. Two independent EN pins place respective outputs into TRI-STATE, reducing supply current from 125 mA (active) to 55 mA (TRI-STATE), supporting hot-swap and power-gating applications.

Key Specifications

Parameter	Value and Actual Design Meaning
Max Data Rate	800 Mbps - supports high-bandwidth serial links such as LVDS-based backplane interconnects and video timing interfaces.
Supply Voltage	+3.3 V (3.0–3.6 V range) - compatible with standard logic rails and eliminates need for dual supplies.
Output Skew	35 ps (typ) channel-to-channel - ensures tight timing alignment critical for parallel LVDS bus distribution.
Jitter (Pk-Pk)	65 ps (typ) at 800 Mbps with PRBS23−1 - meets stringent eye-opening requirements for multi-drop and long-reach signaling.
Switch Time	1.2 ns (typ) - enables rapid reconfiguration between primary/backup paths in fault-tolerant systems.
Propagation Delay	1.3 ns (typ) - minimizes latency in repeater and buffer applications without requiring complex deskew compensation.
Power Dissipation	330 mW (typ) total - enables thermal management in compact, high-density modules without forced air cooling.

Pinout & Package

DS90CP22MT is housed in a 16-pin TSSOP (PW) package, 4.4 mm × 5.0 mm, 1.2 mm max height, RoHS-compliant, with exposed pad not electrically connected. Pin 1 index area located at top-left corner; moisture sensitivity level (MSL) is Level-1 (260°C peak reflow, unlimited floor life).

Pin/Terminal	Circuit Role	Design Meaning
IN0+, IN0−	LVDS Input Pair A	Differential input accepting LVDS or LVPECL signals; requires external bias if unused to prevent noise coupling.
IN1+, IN1−	LVDS Input Pair B	Second differential input; independently selectable via SEL0/SEL1 for crosspoint or mux/demux routing.
OUT0+, OUT0−	LVDS Output Pair A	Configurable output driven by selected input; placed in TRI-STATE when EN0 = LOW.
OUT1+, OUT1−	LVDS Output Pair B	Independent output pair with identical functionality and timing to OUT0; controlled by EN1.
SEL0, SEL1	Mode Select Inputs	CMOS/TTL-level control pins determining functional mode per Table 1; internal pull-downs allow NC if LOW state desired.
EN0, EN1	Output Enable Inputs	Active-HIGH enables respective output; drives output into high-impedance state when LOW, reducing system power.
VCC, GND	Power & Ground	Single 3.3 V supply rail; requires local 0.01–0.1 µF RF ceramic + tantalum bypass capacitors per TI layout guidelines.
NC	No Connect	Two unconnected pins; must remain floating-no routing or grounding permitted.

Key Features

Feature	Design Value
LVDS/LVPECL Input Compatibility	Accepts LVPECL signals directly without attenuation networks-reduces external component count and board space in mixed-signal systems.
Configurable Operating Modes	Four distinct functions (1:2 splitter, repeater, crosspoint, 2:1 mux) enabled by two digital control pins-eliminates need for multiple discrete switches in modular designs.
Per-Output TRI-STATE Control	Independent EN0/EN1 pins allow selective disabling of each output-enables dynamic power gating and prevents bus contention in shared media.
Low Channel-to-Channel Skew	35 ps (typ) skew between OUT0 and OUT1-ensures deterministic timing for parallel LVDS fan-out in clock/data distribution.
High-Speed Switching	1.2 ns (typ) switch time with 1.3 ns (typ) propagation delay-supports real-time failover in redundant communication paths without introducing latency bottlenecks.

Applications

Rack-Mounted Backplane Interconnect	Fault-Tolerant Redundancy Switching
Use Scenario: Distributing high-speed serial data across multiple blade slots in a telecom chassis using a shared LVDS backplane. IC Role / Device Role / Timing Role: 1:2 signal splitter routing one input stream to two downstream receivers while maintaining signal integrity and skew alignment. Use Value: Enables simultaneous monitoring or load-sharing without signal degradation-verified at 800 Mbps with <65 ps jitter and matched 35 ps output skew.	Use Scenario: Automatic switchover between primary and backup data paths in avionics or industrial control systems upon link failure detection. IC Role / Device Role / Timing Role: 2:1 multiplexer selecting between active and standby LVDS sources under SEL0/SEL1 control with sub-nanosecond setup/hold timing. Use Value: Achieves <1.2 ns switch time and <1.3 ns propagation delay-minimizing interruption window during failover events.
LVDS Signal Repeater	Multi-Drop LVDS Bus Expansion
Use Scenario: Restoring amplitude and timing margins on long LVDS traces (>30 cm) connecting FPGA I/O to remote ADC/DAC modules. IC Role / Device Role / Timing Role: Two-channel LVDS repeater buffering and reshaping signals to drive additional segments with full 800 Mbps compliance. Use Value: Compensates for trace loss while preserving eye opening-demonstrated via clean eye patterns in Figure 2 at 800 Mbps.	Use Scenario: Expanding a single LVDS source to eight endpoints across a distributed sensor network using cascaded devices. IC Role / Device Role / Timing Role: Building hierarchical fan-out trees where each DS90CP22MT acts as a 1:2 splitter node with cumulative propagation delay of 3.9 ns (typ) over three stages. Use Value: Supports scalable topology with predictable timing budget-TI confirms 2×8 expansion feasible with <4 ns total delay.

Rack-Mounted Backplane Interconnect

Fault-Tolerant Redundancy Switching

Use Scenario: Distributing high-speed serial data across multiple blade slots in a telecom chassis using a shared LVDS backplane.

IC Role / Device Role / Timing Role: 1:2 signal splitter routing one input stream to two downstream receivers while maintaining signal integrity and skew alignment.

Use Value: Enables simultaneous monitoring or load-sharing without signal degradation-verified at 800 Mbps with <65 ps jitter and matched 35 ps output skew.

Use Scenario: Automatic switchover between primary and backup data paths in avionics or industrial control systems upon link failure detection.

IC Role / Device Role / Timing Role: 2:1 multiplexer selecting between active and standby LVDS sources under SEL0/SEL1 control with sub-nanosecond setup/hold timing.

Use Value: Achieves <1.2 ns switch time and <1.3 ns propagation delay-minimizing interruption window during failover events.

LVDS Signal Repeater

Multi-Drop LVDS Bus Expansion

Use Scenario: Restoring amplitude and timing margins on long LVDS traces (>30 cm) connecting FPGA I/O to remote ADC/DAC modules.

IC Role / Device Role / Timing Role: Two-channel LVDS repeater buffering and reshaping signals to drive additional segments with full 800 Mbps compliance.

Use Value: Compensates for trace loss while preserving eye opening-demonstrated via clean eye patterns in Figure 2 at 800 Mbps.

Use Scenario: Expanding a single LVDS source to eight endpoints across a distributed sensor network using cascaded devices.

IC Role / Device Role / Timing Role: Building hierarchical fan-out trees where each DS90CP22MT acts as a 1:2 splitter node with cumulative propagation delay of 3.9 ns (typ) over three stages.

Use Value: Supports scalable topology with predictable timing budget-TI confirms 2×8 expansion feasible with <4 ns total delay.

Equivalent & Alternatives

The following parts are listed as comparable options for similar LVDS crosspoint switch applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
DS90CP22M-8/NOPB	Identical electrical specs and function table; SOIC-16 package (6.2 mm × 10.3 mm) vs. TSSOP-16 (4.4 mm × 5.0 mm).	Better suited for through-hole prototyping or legacy SOIC footprints; higher thermal resistance (11.48 mW/°C derating vs. 9.6 mW/°C).	Select DS90CP22M-8/NOPB only when board layout or assembly process mandates SOIC; otherwise prefer DS90CP22MT for space-constrained designs.
SN65LVDS22DR	2×2 LVDS repeater with fixed repeater-only function (no mux/demux/crosspoint); 1.5 ns max propagation delay vs. 1.6 ns (max) for DS90CP22MT.	Limited to point-to-point buffering; lacks SEL/EN configurability and TRI-STATE per output-unsuitable for dynamic switching or power-gating.	Choose SN65LVDS22DR only for simple repeater roles where mode flexibility and per-output control are unnecessary.

Compared with DS90CP22MT, DS90CP22M-8/NOPB offers identical performance in a larger SOIC package ideal for manual assembly or thermal margin, while SN65LVDS22DR provides lower-cost repeater-only functionality but sacrifices configurability, TRI-STATE control, and multi-mode operation required for fault-tolerant or expandable architectures.

Availability

DS90CP22MT is available at Aetrix Electronics and suitable for rack-mounted backplane interconnects, fault-tolerant redundancy switching, and LVDS signal repeater applications requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for DS90CP22MT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and high-performance interface solutions, with decades of expertise in signal integrity and high-speed interconnect design.

The DS90CP22MT belongs to TI's LVDS interface portfolio, engineered specifically for robust, low-jitter, multi-gigabit-per-second serial data routing in mission-critical industrial, telecom, and aerospace systems.

FAQ

What is the maximum supported data rate for DS90CP22MT?

The DS90CP22MT supports DC to 800 Mbps operation with verified performance including 65 ps (typ) peak-to-peak jitter and clean eye diagrams at that rate. This maximum rate is validated under PRBS23−1 pattern, 300 mV input differential voltage, and 1.2 V common-mode voltage per the SNLS053E datasheet.

Does DS90CP22MT accept LVPECL inputs directly?

Yes, DS90CP22MT LVDS receiver inputs accept LVPECL signals directly without external attenuation networks. The input threshold is specified at ±100 mV, and common-mode range extends from 0.05 V to 3.25 V, accommodating LVPECL's typical 1.2–2.0 V common-mode levels.

How does the DS90CP22MT handle unused LVDS inputs?

Unused LVDS inputs on DS90CP22MT must be terminated externally: IN+ pulled to VCC via 10 kΩ and IN− pulled to GND via 10 kΩ. This prevents noise coupling into the high-speed input stage and ensures a known logic state, as confirmed in the Application Information section of the datasheet.

Can DS90CP22MT operate in both 1:2 splitter and 2:1 mux modes simultaneously?

No, DS90CP22MT operates in only one functional mode at a time, determined by the SEL0/SEL1 pin states per Table 1. For example, SEL0=0/SEL1=0 configures both outputs to replicate IN0 (1:2 splitter), while SEL0=0/SEL1=1 routes IN0→OUT0 and IN1→OUT1 (repeater). Simultaneous mode operation is not supported.

What is the thermal performance difference between DS90CP22MT and DS90CP22M-8/NOPB?

DS90CP22MT (TSSOP-16) has a package power derating of 9.6 mW/°C above +25°C, while DS90CP22M-8/NOPB (SOIC-16) derates at 11.48 mW/°C. This means the TSSOP version maintains higher allowable power dissipation at elevated ambient temperatures-critical for compact, sealed enclosures where airflow is limited.

DS90CP22MT Specifications

Product attributes: Attribute value

Manufacturer:: Texas Instruments

Series:: -

Package/Case:: 16-TSSOP (0.173", 4.40mm Width)

Packaging:: Bulk

Product Status:: Last Time Buy

Type:: Crosspoint Switch

Circuit:: 1 x 2:2

Independent Circuits:: 1

Current - Output High, Low:: -

Voltage Supply Source:: Single Supply

Voltage - Supply:: 3V ~ 3.6V

Operating Temperature:: -40°C ~ 85°C

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 16-TSSOP

DS90CP22MT FAQ

1.How can I place an order for DS90CP22MT through Aetrix?

Please submit a Request for Quotation (RFQ) for DS90CP22MT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for DS90CP22MT reliable?

The price and inventory of DS90CP22MT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS90CP22MT is usually 5 days.

3.What payment methods are accepted for DS90CP22MT?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS90CP22MT transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for DS90CP22MT?

DS90CP22MT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your DS90CP22MT order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for DS90CP22MT?

For technical support, including DS90CP22MT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS90CP22MT requirements.

6.How does Aetrix verify that DS90CP22MT is sourced from the original manufacturer or authorized distributors?

All DS90CP22MT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS90CP22MT meets industry standards.

7.What is the process for return or replacement of DS90CP22MT?

All DS90CP22MT units undergo pre-shipment inspection (PSI). If there is an issue with DS90CP22MT, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The DS90CP22MT part is unused and in its original packaging.

Return procedure for DS90CP22MT:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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