Texas Instruments DS90CR218AMTD/NOPB

Overview

DS90CR218AMTD/NOPB from Texas Instruments (formerly National Semiconductor) is a 21-bit LVDS transmitter IC that converts parallel CMOS/TTL data into three differential LVDS data streams plus one LVDS clock stream, supporting up to 85 MHz shift clock and 1.785 Gbps aggregate throughput. It implements rising-edge data strobe timing, operates at +3.3 V, and targets high-speed serial link applications in flat-panel display interfaces and embedded video systems.

For engineers reviewing the DS90CR218AMTD/NOPB datasheet, DS90CR218AMTD/NOPB pinout, DS90CR218AMTD/NOPB application, or DS90CR218AMTD/NOPB equivalent, key selection criteria include its 21-bit parallel-to-serial conversion capability, TSSOP-48 package with validated LVDS output swing (250–450 mV), ±1 V common-mode input range, PLL-based clock recovery, and compatibility with TIA/EIA-644 LVDS standard.

Technical Context

The DS90CR218AMTD/NOPB uses an internal PLL to generate a synchronized transmit clock from the input TxCLK IN signal, eliminating external loop filter components. Its transmitter architecture maps 21 parallel TTL inputs across three LVDS data lanes (7 bits per lane) plus one dedicated LVDS clock lane, enabling deterministic channel-to-channel skew control.

It supports 20–85 MHz input clock frequencies with 50% duty cycle output clock, features programmable power-down via PWR DWN pin (active-low), and maintains LVDS compliance through tightly controlled differential output voltage (VOD = 250–450 mV) and offset voltage (VOS = 1.125–1.375 V) over temperature and supply variation.

Key Specifications

Pinout & Package

DS90CR218AMTD/NOPB is housed in a low-profile 48-lead TSSOP package (NS package code MTD48), with dedicated power domains for TTL logic (VCC/GND), PLL (PLL VCC/PLL GND), and LVDS outputs (LVDS VCC/LVDS GND) to minimize noise coupling.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LVDS transmitter applications.

Compared with DS90CR217MTD (pin-identical and functionally equivalent) and SN65LVDS31DR (lower channel count, no PLL), DS90CR218AMTD/NOPB uniquely delivers 21-bit parallel-to-LVDS conversion with embedded clock forwarding - essential for high-resolution video transport requiring deterministic skew control and >1 Gbps throughput.

Availability

DS90CR218AMTD/NOPB is available at Aetrix Electronics and suitable for flat-panel display interfaces, industrial camera links, VGA-to-LVDS bridges, and embedded video backplanes requiring stable component supply and long-term manufacturability.

Supply support for DS90CR218AMTD/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments acquired National Semiconductor in 2011 and maintains full technical support, datasheets, and product continuity for legacy Channel Link devices.

The DS90CR218AMTD/NOPB belongs to TI's Channel Link family - engineered specifically for high-speed, low-skew parallel-to-serial conversion in display and imaging subsystems where EMI reduction and cable size minimization are critical.

FAQ

What is the maximum supported input clock frequency for DS90CR218AMTD/NOPB?

The DS90CR218AMTD/NOPB supports input clock frequencies from 20 MHz to 85 MHz. At 85 MHz, it achieves 1.785 Gbps aggregate throughput (21 bits × 85 MHz). Operation above 85 MHz is not specified and violates the device's AC timing limits, including setup/hold and pulse position tolerances.

Does DS90CR218AMTD/NOPB require external components for PLL operation?

No, DS90CR218AMTD/NOPB integrates a fully self-contained PLL with no external components required. The PLL locks to the TxCLK IN signal and generates the internal timing needed for LVDS serialization, eliminating loop filter capacitors or resistors typically associated with discrete PLL designs.

How is DS90CR218AMTD/NOPB pin-compatible with other Channel Link transmitters?

DS90CR218AMTD/NOPB shares identical pinout, package (TSSOP-48), and electrical behavior with DS90CR217MTD. Both devices map TxIN[0:20], TxCLK IN, PWR DWN, and all LVDS outputs to the same physical pins and support identical timing parameters and supply configurations.

What termination is required at the receiver for DS90CR218AMTD/NOPB LVDS outputs?

Each LVDS differential pair (three data lanes + one clock lane) requires a 100 Ω termination resistor placed across the true/complement lines at the receiver input. This matches the nominal differential impedance of standard LVDS cabling and ensures proper signal integrity, minimal reflections, and optimal noise rejection.

Can unused TxIN pins on DS90CR218AMTD/NOPB be left floating?

No, unused TxIN pins on DS90CR218AMTD/NOPB must not be left floating. Per National Semiconductor application guidance, they should be tied to GND to prevent noise coupling, undefined logic states, or increased power consumption due to input stage oscillation.