Texas Instruments DS90CR218AMTDX/NOPB
- Part No.:
- DS90CR218AMTDX/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Specialized
- Package:
- 48-TFSOP (0.240", 6.10mm Width)
- Datasheet:
-
DS90CR218AMTDX/NOPB.pdf
- Description:
- IC INTERFACE SPECIALIZED 48TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:1,730
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Product details
Overview
DS90CR218AMTDX/NOPB from Texas Instruments (formerly National Semiconductor) is a 21-bit LVDS transmitter IC that converts parallel CMOS/TTL data into three differential LVDS data streams plus one LVDS clock stream, supporting up to 85 MHz shift clock and 1.785 Gbps aggregate throughput. It implements rising-edge data strobe timing, features integrated PLL with no external components, and targets high-speed point-to-point interconnects in display and imaging systems.
For engineers reviewing the DS90CR218AMTDX/NOPB datasheet, DS90CR218AMTDX/NOPB pinout, DS90CR218AMTDX/NOPB application, or DS90CR218AMTDX/NOPB equivalent, key selection criteria include 21-bit parallel-to-serial conversion, TSSOP-48 package compatibility, 3.3 V operation, ±1 V common-mode input range, and compliance with TIA/EIA-644 LVDS standard.
Technical Context
The DS90CR218AMTDX/NOPB employs a phase-locked loop to generate a synchronized LVDS transmit clock aligned to the rising edge of the input clock, enabling precise sampling of 21-bit parallel inputs. Its transmitter architecture delivers three 7-bit LVDS data lanes plus one dedicated LVDS clock lane, maintaining channel-to-channel skew under 90 ps at 85 MHz.
It supports 20–85 MHz shift clock frequencies with 50% duty cycle output clock, operates across −10°C to +70°C ambient, and integrates separate power domains for TTL inputs (VCC), PLL (PLL VCC), and LVDS outputs (LVDS VCC) to minimize noise coupling and jitter.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 3.0–3.6 V - ensures stable operation with standard 3.3 V rail and 10% tolerance margin |
| Data Rate per Lane | 595 Mbps - enables 21-bit parallel data transmission at 85 MHz clock (7 bits × 85 MHz) |
| Total Throughput | 1.785 Gbps - supports high-resolution digital video and imaging interfaces without wide parallel buses |
| Differential Output Swing | 250–450 mV - low EMI emission compliant with TIA/EIA-644 LVDS standard |
| Common-Mode Range | ±1 V around +1.2 V - accommodates ground potential differences between PCBs or cables |
| Power Consumption | 39–57 mA at 85 MHz - optimized for low-power embedded display links with thermal headroom |
| Input Setup/Hold Time | 2.5 ns setup, 0 ns hold - tight timing margins require clean, low-jitter TxCLK IN signal |
Pinout & Package
DS90CR218AMTDX/NOPB is housed in a low-profile 48-pin TSSOP package (NS MTD48), with dedicated power/ground pins segmented by function: 4× VCC (TTL logic), 5× GND (TTL logic), 1× PLL VCC, 2× PLL GND, 1× LVDS VCC, and 3× LVDS GND - enabling noise-isolated supply routing.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| TxIN[0:20] | CMOS/TTL Data Input | 21-bit parallel data bus sampled on rising edge of TxCLK IN; unused inputs may be tied to GND |
| TxCLK IN | CMOS/TTL Clock Input | Rising-edge data strobe; must be present before PWR DWN deassertion to ensure PLL lock |
| PWR DWN | Active-Low Powerdown Control | Tri-states all LVDS outputs and reduces supply current to 10–55 µA when asserted |
| TxOUT+[0:2], TxOUT−[0:2] | LVDS Data Output Pair | Three differential 7-bit data lanes (21 bits total); each pair requires 100 Ω termination at receiver |
| TxCLK OUT+, TxCLK OUT− | LVDS Clock Output Pair | Dedicated differential clock lane; provides synchronous reference for receiver clock recovery |
| VCC / GND / PLL VCC / PLL GND / LVDS VCC / LVDS GND | Supply & Ground Terminals | Functionally isolated power domains reduce crosstalk and improve jitter performance |
Key Features
| Feature | Design Value |
|---|---|
| Integrated PLL with zero external components | Eliminates need for external loop filter or crystal, reducing BOM count and layout complexity |
| Rising-edge data strobe architecture | Enables deterministic sampling alignment with minimal setup/hold overhead on parallel inputs |
| Separate power domains (VCC, PLL VCC, LVDS VCC) | Minimizes supply-induced jitter and improves LVDS signal integrity in mixed-signal environments |
| 345 mV typical LVDS output swing | Reduces electromagnetic emissions while maintaining robust noise margin against 100 mV receiver threshold |
| 100 Ω differential termination support | Matches standard cable impedance (90–120 Ω), enabling reliable transmission over twin-coax or twisted-pair up to 5 m |
Applications
| Industrial LCD Panel Interface | Medical Imaging Sensor Link |
|---|---|
Use Scenario: Transmitting RGB+sync pixel data from controller to high-resolution TFT panel over flexible flat cable. IC Role / Device Role / Timing Role: Parallel-to-serial serializer converting 21-bit video bus into four LVDS lanes (3 data + 1 clock) with rising-edge strobe timing. Use Value: Replaces 24+ wire ribbon cable with 4-pair differential cable, cutting EMI and connector size while sustaining 1080p@60Hz throughput. | Use Scenario: Streaming raw sensor output from CMOS image sensor to FPGA-based processing board in endoscopic camera. IC Role / Device Role / Timing Role: High-fidelity 21-bit pixel data serializer with sub-ns skew control and low-jitter clock forwarding. Use Value: Enables lossless 12-bit monochrome image transfer at >70 MB/s with <90 ps inter-lane skew, preserving dynamic range. |
| Automotive Digital Cluster Display | Test Equipment High-Speed Data Capture |
Use Scenario: Driving TFT instrument cluster from MCU over extended temperature automotive harness. IC Role / Device Role / Timing Role: Robust LVDS transmitter operating from −10°C to +70°C with ±1 V common-mode tolerance for ground offset compensation. Use Value: Maintains signal integrity across noisy vehicle harnesses using twin-coax cable with overall shield, meeting CISPR 25 Class 5 EMI limits. | Use Scenario: Capturing high-speed digital waveform data from ASIC under test into memory buffer via FPGA interface. IC Role / Device Role / Timing Role: Low-latency parallel capture front-end with deterministic clock/data alignment for time-critical sampling. Use Value: Provides 1.785 Gbps sustained bandwidth with <2.5 ns input setup window, enabling accurate timestamping of transient events. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LVDS serializer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS90CR217MTD | Identical pinout, identical electrical specs, same TSSOP-48 package; DS90CR217 is predecessor with identical functional behavior | No functional difference; DS90CR217MTD is legacy marking but fully interchangeable in design | Select DS90CR217MTD only if legacy stock or dual-sourcing requirement exists; DS90CR218AMTDX/NOPB is preferred current production part |
| SN65LVDS31DR | 4-channel LVDS line driver (not serializer); no PLL, no parallel input, no clock forwarding - only differential level translation | Cannot replace DS90CR218AMTDX/NOPB in parallel-to-serial conversion role; suitable only for point-to-point LVDS signal extension | Use SN65LVDS31DR only for LVDS signal buffering after serialization; not a functional alternative for DS90CR218AMTDX/NOPB's core 21-bit serializer function |
Compared with DS90CR217MTD, DS90CR218AMTDX/NOPB offers identical functionality with updated packaging and RoHS compliance (NOPB suffix), while SN65LVDS31DR serves a fundamentally different signal-conditioning role and cannot perform parallel-to-serial conversion or clock embedding.
Availability
DS90CR218AMTDX/NOPB is available at Aetrix Electronics and suitable for industrial LCD panel interface, medical imaging sensor link, and automotive digital cluster display applications requiring stable component supply, long-term lifecycle support, and guaranteed RoHS-compliant sourcing.
Supply support for DS90CR218AMTDX/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments acquired National Semiconductor in 2011 and maintains full technical and manufacturing continuity for its high-speed interface portfolio.
The DS90CR218AMTDX/NOPB belongs to TI's Channel Link serializer family, designed specifically for EMI-sensitive, high-bandwidth parallel bus replacement in display, imaging, and instrumentation systems.
FAQ
What is the maximum supported clock frequency for DS90CR218AMTDX/NOPB?
The DS90CR218AMTDX/NOPB supports shift clock frequencies from 20 MHz to 85 MHz. At 85 MHz, it achieves 1.785 Gbps aggregate throughput (21 bits × 85 MHz). Operation above 85 MHz is not specified and violates absolute maximum ratings for timing margins and jitter performance. The device's PLL and output drivers are characterized and guaranteed only within this range.
Does DS90CR218AMTDX/NOPB require external components for PLL operation?
No, DS90CR218AMTDX/NOPB integrates a fully self-contained PLL with no external components required. Its internal loop filter and oscillator eliminate the need for external capacitors or resistors, simplifying layout and improving reliability. This is confirmed in the "Features" section of the official datasheet and validated in typical application schematics.
What is the recommended termination for DS90CR218AMTDX/NOPB LVDS outputs?
Each LVDS differential pair (three data lanes and one clock lane) must be terminated with a single 100 Ω resistor across the true/complement lines at the receiver end. The resistor value should match the cable's differential characteristic impedance (typically 90–120 Ω); surface-mount placement adjacent to receiver pins minimizes stub effects and preserves signal integrity.
Can unused TxIN pins on DS90CR218AMTDX/NOPB be left floating?
No, unused TxIN pins on DS90CR218AMTDX/NOPB must not be left floating. Per the Applications Information section, they should be tied to ground (GND) to prevent noise coupling and undefined logic states. Floating TTL inputs risk increased power consumption, oscillation, or false triggering due to noise sensitivity.
Is DS90CR218AMTDX/NOPB compatible with TIA/EIA-644 LVDS standard?
Yes, DS90CR218AMTDX/NOPB is explicitly designed and tested for full compatibility with the TIA/EIA-644 LVDS standard. Its differential output voltage (250–450 mV), common-mode range (±1 V around +1.2 V), and noise margin specifications meet all mandatory requirements of the standard, ensuring interoperability with compliant receivers.
DS90CR218AMTDX/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 48-TFSOP (0.240", 6.10mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- -
- Interface:
- -
- Voltage - Supply:
- 3V ~ 3.6V
- Supplier Device Package:
- 48-TSSOP
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
DS90CR218AMTDX/NOPB FAQ
1.How can I place an order for DS90CR218AMTDX/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for DS90CR218AMTDX/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
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The price and inventory of DS90CR218AMTDX/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS90CR218AMTDX/NOPB is usually 5 days.
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5.How can I obtain technical support or documentation for DS90CR218AMTDX/NOPB?
For technical support, including DS90CR218AMTDX/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS90CR218AMTDX/NOPB requirements.
6.How does Aetrix verify that DS90CR218AMTDX/NOPB is sourced from the original manufacturer or authorized distributors?
All DS90CR218AMTDX/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS90CR218AMTDX/NOPB meets industry standards.
7.What is the process for return or replacement of DS90CR218AMTDX/NOPB?
All DS90CR218AMTDX/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with DS90CR218AMTDX/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS90CR218AMTDX/NOPB part is unused and in its original packaging.
Return procedure for DS90CR218AMTDX/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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