Texas Instruments DS90CR286AMTD/NOPB

Overview

DS90CR286AMTD/NOPB from Texas Instruments is a 28-bit LVDS-to-LVCMOS deserializer IC used as a high-speed serial link receiver in display interface systems. It converts four LVDS data lanes plus one LVDS clock (20–66 MHz) into 28 parallel 3.3-V LVCMOS outputs - including 24-bit RGB and 4 control bits (HSYNC, VSYNC, DE, CNTL) - with best-in-class setup/hold timing and <270 mW typical power at 66 MHz.

For engineers reviewing the DS90CR286AMTD/NOPB datasheet, DS90CR286AMTD/NOPB pinout, DS90CR286AMTD/NOPB application, or DS90CR286AMTD/NOPB equivalent, this page delivers verified technical context, real-world timing margins, package-validated pin functions, and precise alternative part comparisons for automotive infotainment, industrial displays, and GPU-to-panel video links.

Technical Context

The DS90CR286AMTD/NOPB implements a fully integrated PLL that locks to incoming LVDS clock (20–66 MHz), enabling deterministic sampling of serialized 4× LVDS data streams - each running up to 462 Mbps - to reconstruct 28-bit parallel LVCMOS output strobed on the rising edge of RxCLKOUT. Its internal architecture includes five LVDS receivers (four data + one clock), a jitter-tolerant PLL with no external components, and a serial-to-parallel converter mapping LVDS bit positions to defined RxOUT[27:0] outputs per TI Figure 6.

It supports RSKM (Receiver Skew Margin) of 400 ps at 66 MHz, accommodating interconnect skew, ISI, and ≤250 ps cycle-to-cycle jitter from compliant Channel Link I transmitters. Power-down mode (PWR DWN active-low) reduces supply current to <55 μA while holding outputs low, and all LVCMOS outputs meet 3.3-V LVCMOS DC specs with VOH ≥2.7 V and VOL ≤0.3 V at rated loads.

Key Specifications

Pinout & Package

DS90CR286AMTD/NOPB uses a 56-pin TSSOP (DGG) package measuring 14.00 mm × 6.10 mm, with dedicated power domains for LVDS inputs (LVDS VCC/GND), PLL (PLL VCC/GND), and LVCMOS outputs (VCC/GND).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LVDS deserializer applications.

Compared with DS90CR286AQMT, DS90CR286AMTD/NOPB offers identical functionality and timing but lacks automotive qualification; compared with DS90CR216AMTD, it provides 7 additional data bits and higher throughput for 24-bit color fidelity and larger displays - making it the only choice for full HD+ RGB interfaces requiring >18-bit depth.

Availability

DS90CR286AMTD/NOPB is available at Aetrix Electronics and suitable for automotive infotainment systems, industrial HMI displays, medical imaging monitors, and avionics multi-function displays requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for DS90CR286AMTD/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company specializing in analog, embedded processing, and connectivity technologies, with leadership in high-speed interface solutions for automotive, industrial, and communications markets.

The DS90CR286AMTD/NOPB belongs to TI's Channel Link I deserializer product line, designed specifically to replace wide parallel RGB buses with noise-immune, area-efficient LVDS serial links for display interfaces in demanding environments.

FAQ

What is the maximum data rate supported by DS90CR286AMTD/NOPB?

The DS90CR286AMTD/NOPB supports an LVDS clock input from 20 MHz to 66 MHz. At 66 MHz, each of the four LVDS data lanes operates at 462 Mbps, yielding a total throughput of 1.848 Gbps. This enables transmission of 24-bit RGB + 4 control signals for high-resolution displays without compromising timing integrity.

Does DS90CR286AMTD/NOPB require external components for PLL operation?

No, DS90CR286AMTD/NOPB integrates a fully self-contained PLL that requires no external capacitors, resistors, or crystals. The PLL locks directly to the incoming LVDS clock (RxCLKIN±), eliminating external loop filter components and simplifying PCB layout while maintaining low jitter performance.

How does DS90CR286AMTD/NOPB handle power-down mode?

When the PWR DWN pin is asserted low, DS90CR286AMTD/NOPB enters power-down mode, reducing supply current to <55 μA. All LVCMOS outputs (RxOUT[27:0] and RxCLKOUT) are actively driven low, ensuring defined logic states for downstream circuitry during standby or sleep cycles.

What is the RSKM value for DS90CR286AMTD/NOPB at 66 MHz?

At 66 MHz, DS90CR286AMTD/NOPB achieves an RxIN Skew Margin (RSKM) of 400 ps. This margin accommodates interconnect skew, inter-symbol interference, and up to 250 ps cycle-to-cycle jitter from compliant Channel Link I transmitters - ensuring reliable data recovery over varied cable lengths and PCB trace topologies.

Is DS90CR286AMTD/NOPB compatible with standard LVDS signaling?

Yes, DS90CR286AMTD/NOPB is fully compliant with the TIA/EIA-644 LVDS standard. Its LVDS inputs accept differential voltages from 0 V to 2.4 V with 100-mV threshold hysteresis, and it requires standard 100-Ω termination across each differential pair - placed as close as possible to the RxIN± pins for optimal signal integrity.