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Texas Instruments DS90CR288AMTD
- Part No.:
- DS90CR288AMTD
- Manufacturer:
- Texas Instruments
- Category:
- Specialized
- Package:
- 56-TFSOP (0.240", 6.10mm Width)
- Datasheet:
-
DS90CR288AMTD.pdf
- Description:
- IC INTERFACE SPECIALIZED 56TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:371
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Product details
Overview
DS90CR288AMTD from Texas Instruments (formerly National Semiconductor) is a 28-bit LVDS receiver IC that converts four LVDS data streams and one LVDS clock into parallel 28-bit LVCMOS/LVTTL data outputs, supporting up to 85 MHz shift clock frequency, 2.38 Gbps aggregate throughput, and 50% duty cycle output clock - used in high-speed display interconnects between graphics controllers and flat-panel timing controllers.
For engineers reviewing the DS90CR288AMTD datasheet, DS90CR288AMTD pinout, DS90CR288AMTD application, or DS90CR288AMTD equivalent, key selection criteria include LVDS input compatibility with TIA/EIA-644, 3.3 V supply operation, 56-pin TSSOP package, power-down control, and skew margin of 290 ps at 85 MHz.
Technical Context
The DS90CR288AMTD implements a PLL-based clock recovery architecture to reconstruct a clean 85 MHz TTL clock from the incoming LVDS clock pair (RxCLK IN±), enabling synchronous sampling of four serialized LVDS data lanes. It delivers 28-bit parallel outputs (RxOUT[0:27]) with precise strobe-aligned timing, where RSPos0–RSPos6 define input strobe positions across bit lanes with ±0.35 ns variation.
It supports full-channel-link interoperability with DS90CR287 transmitter, includes failsafe biasing for floating LVDS inputs, and features internal termination-independent operation requiring only external 100 Ω differential termination per LVDS pair. Power-down mode reduces supply current to 140–400 µA while holding outputs low.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 3.0–3.6 V - operates reliably across industrial voltage tolerance without regulation overhead |
| Data Rate per Lane | 595 Mbps - enables 28-bit parallel-to-serial conversion at 85 MHz clock rate |
| Aggregate Throughput | 2.38 Gbps - replaces wide 28-bit TTL buses, reducing EMI and connector count |
| Receiver Skew Margin | 290 ps - accommodates cable skew up to ~140 ps while preserving valid sampling window |
| Output Transition Time | 1.8–3.5 ns - ensures fast CMOS/TTL edge rates compatible with downstream logic |
| Power-Down Current | 140–400 µA - minimizes standby power in display sleep modes |
| LVDS Input Threshold | ±100 mV differential - provides robust noise immunity against common-mode interference |
Pinout & Package
DS90CR288AMTD uses a 56-lead TSSOP package (NS package code MTD56), low-profile surface-mount format with 0.5 mm pitch, optimized for compact PCB layout and thermal dissipation in display interface modules.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RxIN+[0:3] | Input | Positive differential inputs for four LVDS data lanes - require 100 Ω termination to RxIN− |
| RxIN−[0:3] | Input | Negative differential inputs for four LVDS data lanes - form matched pairs with RxIN+ |
| RxCLK IN+ | Input | Positive leg of LVDS clock input pair - drives internal PLL for clock recovery |
| RxCLK IN− | Input | Negative leg of LVDS clock input pair - differential reference for jitter-tolerant lock |
| RxOUT[0:27] | Output | 28-bit LVCMOS/LVTTL parallel data outputs - strobed by rising edge of RxCLK OUT |
| RxCLK OUT | Output | TTL-level recovered clock output - 50% duty cycle, synchronized to input data |
| PWR DOWN | Input | Active-low control - forces outputs low and reduces ICC to µA range when asserted |
| VCC (4 pins) | Power | +3.3 V supply for TTL output drivers - decoupling required per NS AN-1108 guidelines |
| GND (5 pins) | Ground | Dedicated ground returns for TTL I/O - minimize switching noise coupling |
| LVDS VCC | Power | +3.3 V supply for LVDS input receivers - separate from logic VCC for noise isolation |
| LVDS GND (3 pins) | Ground | Ground return for LVDS input circuitry - critical for common-mode rejection |
| PLL VCC | Power | +3.3 V supply for phase-locked loop - highest priority for decoupling (0.1/0.01/0.001 µF) |
| PLL GND (2 pins) | Ground | Ground return for PLL core - must be low-inductance path to preserve jitter performance |
Key Features
| Feature | Design Value |
|---|---|
| Failsafe input biasing | Guarantees HIGH output state on floating or terminated LVDS inputs - prevents undefined display artifacts |
| 290 ps skew margin | Enables reliable operation over 2+ meter Twin-Coax or ribbon cables with ≤140 ps inter-pair skew |
| No external PLL components | Reduces BOM count and layout complexity - eliminates tuning capacitors or resistors |
| TIA/EIA-644 LVDS compliance | Ensures interoperability with standard LVDS transmitters including DS90CR287 and third-party sources |
| 100 mV differential threshold | Provides ≥200 mV noise margin against differential-mode interference in noisy display environments |
| ±1 V common-mode range | Supports ground potential differences up to 2 V between transmitter and receiver boards |
Applications
| Industrial LCD Timing Control | Medical Imaging Display Interface |
|---|---|
|
Use Scenario: High-resolution TFT-LCD panel driven by FPGA-based timing controller over flexible cable. IC Role / Device Role / Timing Role: DS90CR288AMTD recovers clock and deserializes 28-bit RGB+control data from DS90CR287 transmitter. Use Value: Replaces 40+ pin parallel bus with 10-wire LVDS link, cutting EMI by >20 dB and enabling 1080p@60Hz transmission over 1.5 m flex cable. |
Use Scenario: DICOM-compliant diagnostic monitor receiving real-time ultrasound video stream. IC Role / Device Role / Timing Role: DS90CR288AMTD provides jitter-clean 85 MHz pixel clock and stable 28-bit data for grayscale rendering pipeline. Use Value: 290 ps skew margin ensures sub-pixel timing accuracy across all 28 bits, preventing vertical banding in 12-bit medical images. |
| Avionics Display Data Link | Test Equipment Video Capture |
|
Use Scenario: Ruggedized cockpit display unit receiving graphics from mission computer via shielded twin-coax. IC Role / Device Role / Timing Role: DS90CR288AMTD acts as LVDS-to-TTL bridge with failsafe biasing for fault-tolerant operation. Use Value: ±1 V common-mode range accommodates aircraft chassis ground shifts; power-down mode enables hot-swap capability. |
Use Scenario: Automated optical inspection system capturing high-speed camera output to FPGA frame buffer. IC Role / Device Role / Timing Role: DS90CR288AMTD synchronizes 28-bit pixel data to recovered clock for lossless capture at 85 MSPS. Use Value: 1.8–3.5 ns CMOS output transitions meet setup/hold requirements of Xilinx Artix-7 ILOGIC blocks. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LVDS deserializer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN65LVDS32 | 4-channel LVDS receiver only; no clock recovery, no 28-bit parallel output | Requires external clock source and deserialization logic - not a drop-in replacement | Use only when clock is distributed separately and FPGA handles deserialization |
| DS90CF564MTD | 24-bit LVDS receiver with integrated 10-bit DAC; different pinout and lower max clock (65 MHz) | Targeted for DVI analog front-end, not 28-bit digital display links | Not suitable for DS90CR288AMTD's 28-bit, 85 MHz, or Channel Link protocol requirements |
Compared with SN65LVDS32 and DS90CF564MTD, DS90CR288AMTD uniquely integrates full Channel Link protocol support, 28-bit parallel output, and self-clocked recovery - making it irreplaceable for legacy National Semiconductor display interface designs requiring pin- and function-compatible migration.
Availability
DS90CR288AMTD is available at Aetrix Electronics and suitable for industrial LCD timing control, medical imaging display interfaces, avionics display data links, and test equipment video capture requiring stable component supply and long-term lifecycle support.
Supply support for DS90CR288AMTD includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments acquired National Semiconductor in 2011 and maintains its high-performance interface portfolio, including LVDS, SerDes, and display bridging ICs.
The DS90CR288AMTD belongs to the Channel Link family - designed specifically to replace wide parallel TTL buses in high-speed display and imaging systems with robust, low-EMI differential links.
FAQ
What is the maximum supported clock frequency for DS90CR288AMTD?
The DS90CR288AMTD supports a maximum shift clock frequency of 85 MHz, enabling 2.38 Gbps aggregate data throughput across four LVDS lanes. At this rate, each lane carries 595 Mbps, and the recovered RxCLK OUT maintains 50% duty cycle with ±0.5 ns jitter tolerance. Operation above 85 MHz is not characterized or guaranteed per the official datasheet.
Does DS90CR288AMTD require external termination resistors?
Yes, DS90CR288AMTD requires external 100 Ω differential termination resistors across each LVDS input pair (RxIN+ to RxIN− for lanes 0–3, and RxCLK IN+ to RxCLK IN−). The device itself does not integrate termination; proper placement of surface-mount resistors adjacent to the input pins is mandatory to prevent reflections and ensure signal integrity per AN-1108 guidelines.
Can DS90CR288AMTD operate with a 5 V supply?
No, DS90CR288AMTD is a +3.3 V only device. Its absolute maximum supply voltage is +4 V, and recommended operating range is 3.0–3.6 V. Inputs are not 5 V tolerant - applying 5 V to TxIN, PWR DOWN, or any logic pin risks permanent damage. Migration from 5 V Channel Link devices (e.g., DS90CR284) requires full 3.3 V power rail redesign.
What happens to DS90CR288AMTD outputs during power-down mode?
When PWR DOWN is asserted low, DS90CR288AMTD forces all 28 RxOUT bits and RxCLK OUT to logic LOW while reducing supply current to 140–400 µA. This behavior differs from TRI-STATE operation - outputs are actively driven low, not high-impedance. This ensures predictable display panel behavior during sleep states without external pull-downs.
Is DS90CR288AMTD pin-compatible with earlier National Semiconductor Channel Link receivers?
Yes, DS90CR288AMTD is backward compatible with DS90CR284 in the 56-pin TSSOP (MTD56) package - same pinout, same footprint, and identical power/ground distribution. However, voltage levels differ: DS90CR284 is 5 V, while DS90CR288AMTD is 3.3 V. Direct replacement requires adjusting supply rails and ensuring all interfacing logic is 3.3 V compatible.
DS90CR288AMTD Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 56-TFSOP (0.240", 6.10mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Applications:
- -
- Interface:
- -
- Voltage - Supply:
- 3V ~ 3.6V
- Supplier Device Package:
- 56-TSSOP
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
DS90CR288AMTD FAQ
1.How can I place an order for DS90CR288AMTD through Aetrix?
Please submit a Request for Quotation (RFQ) for DS90CR288AMTD on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS90CR288AMTD reliable?
The price and inventory of DS90CR288AMTD are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS90CR288AMTD is usually 5 days.
3.What payment methods are accepted for DS90CR288AMTD?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS90CR288AMTD transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS90CR288AMTD?
DS90CR288AMTD orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS90CR288AMTD order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS90CR288AMTD?
For technical support, including DS90CR288AMTD datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS90CR288AMTD requirements.
6.How does Aetrix verify that DS90CR288AMTD is sourced from the original manufacturer or authorized distributors?
All DS90CR288AMTD products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS90CR288AMTD meets industry standards.
7.What is the process for return or replacement of DS90CR288AMTD?
All DS90CR288AMTD units undergo pre-shipment inspection (PSI). If there is an issue with DS90CR288AMTD, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS90CR288AMTD part is unused and in its original packaging.
Return procedure for DS90CR288AMTD:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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