Texas Instruments DS90LV019TMX/NOPB
- Part No.:
- DS90LV019TMX/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Drivers, Receivers, Transceivers
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
DS90LV019TMX/NOPB.pdf
- Description:
- IC TRANSCEIVER FULL 1/1 14SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
DS90LV019TMX/NOPB from Texas Instruments (formerly National Semiconductor) is a dual-function 3.3V/5V LVDS driver/receiver IC used for high-speed point-to-point interconnects in industrial and embedded systems. It integrates one differential LVDS driver (3.5 mA loop current, 250–450 mV differential output) and one LVDS receiver (±100 mV threshold, ±1 V common-mode range), with independent TTL/CMOS-compatible control (DIN, DE, RE, ROUT) and flow-through pinout for clean PCB routing.
For engineers reviewing the DS90LV019TMX/NOPB datasheet, DS90LV019TMX/NOPB pinout, DS90LV019TMX/NOPB application, or DS90LV019TMX/NOPB equivalent, key selection considerations include its dual-role operation mode (full-duplex, driver-only, receiver-only, or tri-state), 100+ Mbps signaling capability, low-power CMOS design (ICC ≤ 48 mA at 5 V), and SOIC-14 package compatibility with industrial temperature range (−40°C to +85°C).
Technical Context
The DS90LV019TMX/NOPB implements a fully independent driver and receiver path, each with dedicated enable controls (DE active-high, RE active-low) enabling flexible full-duplex, half-duplex, or isolated signal-direction operation. Its driver converts single-ended TTL/CMOS inputs to low-voltage differential signals (LVDS) with balanced output impedance and glitch-free power-up behavior, while the receiver translates differential LVDS inputs back to TTL/CMOS logic levels with ±100 mV sensitivity over a ±1 V common-mode window.
AC performance is specified across both 3.3 V and 5 V supply conditions: propagation delays range from 1.0–7.0 ns (driver) and 3.0–9.0 ns (receiver), with skew <1.6 ns and transition times <3.0 ns. The device supports fail-safe operation via external termination and meets HBM ESD rating >2.0 kV, making it suitable for noise-sensitive industrial data links.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 3.0–3.6 V or 4.5–5.5 V - supports dual-rail legacy and modern systems without level-shifting. |
| Differential Output Voltage (VOD) | 250–450 mV @ 100 Ω load - ensures robust LVDS compliance and noise margin in point-to-point links. |
| Receiver Input Threshold | ±100 mV - enables reliable detection of low-swing differential signals amid common-mode noise. |
| Propagation Delay (Driver) | 1.0–7.0 ns - supports >100 Mbps data rates with deterministic timing for synchronous interfaces. |
| Power Supply Current (ICC) | 9–48 mA depending on mode and supply - ultra-low power in receiver-only (4.5–7.0 mA at 3.3 V) or tri-state modes. |
| Operating Temperature | −40°C to +85°C - qualified for industrial-grade reliability without derating. |
| ESD Rating (HBM) | >2.0 kV - provides inherent protection against handling and board-level electrostatic discharge. |
Pinout & Package
DS90LV019TMX/NOPB is housed in a 14-pin SOIC (Package Drawing D, NS M14A), with 1.27 mm pitch, 8.65 mm × 3.91 mm body, and flow-through pin arrangement minimizing trace stubs and crosstalk.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (DE) | Driver Enable input | Active-high TTL/CMOS control: enables/disables driver output (DO±); high-impedance when low. |
| 2 (DIN) | Driver input | Single-ended TTL/CMOS logic input driving the LVDS transmitter; referenced to VCC/GND. |
| 4 (ROUT) | Receiver output | TTL/CMOS-compatible output reflecting (RI+) − (RI−) differential state; tri-stated when RE = high. |
| 8 (RE) | Receiver Enable input | Active-low TTL/CMOS control: enables/disables receiver output (ROUT); high-impedance when high. |
| 9, 10 (RI+, RI−) | Receiver differential inputs | LVDS-compatible inputs accepting ±100 mV threshold differential signals over ±1 V common-mode range. |
| 11, 12 (DO+, DO−) | Driver differential outputs | LVDS outputs delivering 3.5 mA loop current and 250–450 mV differential swing into 100 Ω load. |
| 7 (GND) | Ground reference | Primary analog/digital return path; requires low-inductance connection to minimize noise coupling. |
| 14 (VCC) | Power supply | Single supply input supporting either 3.3 V ±0.3 V or 5.0 V ±0.5 V; bypassing with 0.1 µF + 0.01 µF MLCC required. |
Key Features
| Feature | Design Value |
|---|---|
| Independent driver/receiver control | Separate DE and RE pins allow concurrent, asymmetric operation (e.g., driver active while receiver disabled) for flexible bus arbitration. |
| Flow-through pinout | Pins arranged to support straight-line PCB routing between connector and IC, reducing stub length and signal integrity degradation. |
| Glitch-free power-up | Driver automatically remains disabled during power ramp, preventing false edge generation on DO± lines before system stabilization. |
| Fail-safe receiver input | Guaranteed HIGH output on ROUT when inputs are open-circuited - eliminates need for external biasing in unconnected states. |
| Low EMI differential signaling | LVDS output inherently suppresses common-mode noise and radiated emissions, easing EMC compliance in dense layouts. |
Applications
| Industrial Camera Interface | Backplane Data Link |
|---|---|
|
Use Scenario: High-speed pixel data transmission from CMOS image sensor to FPGA-based frame grabber over 10–50 cm PCB traces. IC Role / Device Role / Timing Role: LVDS serializer/deserializer interface conditioner - converts sensor's parallel TTL output to differential pairs and recovers clean logic at receiver end. Use Value: Enables >100 Mbps pixel clock rates with sub-7 ns propagation delay and <1.6 ns skew, preserving timing margins in real-time vision systems. |
Use Scenario: Reliable communication between two daughter cards in a modular test instrument rack using ribbon cable or twisted-pair harness. IC Role / Device Role / Timing Role: Point-to-point LVDS line driver/receiver bridging isolated voltage domains while rejecting ground bounce and switching noise. Use Value: ±1 V common-mode range and ±100 mV threshold tolerate up to 2 V of ground offset between cards, eliminating need for isolation transformers. |
| Motor Drive Feedback Loop | Programmable Logic I/O Expansion |
|
Use Scenario: Transmitting encoder quadrature signals (A/B/Z) from servo motor to motion controller across noisy factory-floor environments. IC Role / Device Role / Timing Role: Noise-immune differential translator - converts single-ended encoder outputs to LVDS for long-haul integrity, then restores TTL logic for MCU input capture. Use Value: >2.0 kV HBM ESD rating and common-mode noise rejection ensure robust operation near high-current IGBT switching circuits. |
Use Scenario: Extending GPIO count of an MCU by connecting remote I/O expander via 15 cm PCB trace, requiring bidirectional signal integrity. IC Role / Device Role / Timing Role: Full-duplex LVDS transceiver enabling simultaneous command (MCU → expander) and status (expander → MCU) transfer on shared differential pair. Use Value: Independent DE/RE control allows dynamic direction switching with <8 ns enable/disable times, supporting burst-mode I²C-like protocols. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LVDS driver/receiver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN65LVDS1 | Single-channel LVDS driver only (no integrated receiver); 3.3 V only; 3 ns typical propagation delay. | Requires external receiver for bidirectional use; better suited for unidirectional high-speed clock/data fanout. | Select when only driver functionality is needed and lower propagation delay is critical; not drop-in for DS90LV019TMX/NOPB's dual-role use case. |
| MAX3045E | 3.3 V LVDS transceiver with integrated failsafe bias and higher ESD (±15 kV contact); no 5 V operation. | Superior ESD robustness and built-in termination bias simplify layout in harsh environments but lack 5 V compatibility. | Prefer for portable or field-deployed equipment where ESD immunity exceeds 2 kV HBM; verify 3.3 V supply constraint aligns with system architecture. |
Compared with SN65LVDS1 and MAX3045E, DS90LV019TMX/NOPB uniquely supports dual-rail (3.3 V/5 V) operation and fully independent driver/receiver enables true full-duplex point-to-point links without external logic or voltage translation - a key advantage in mixed-voltage industrial controllers.
Availability
DS90LV019TMX/NOPB is available at Aetrix Electronics and suitable for industrial camera interfaces, motor drive feedback systems, backplane data links, and programmable logic I/O expansion requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.
Supply support for DS90LV019TMX/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments acquired National Semiconductor in 2011 and maintains its legacy high-performance analog and interface portfolio, emphasizing reliability, broad temperature range, and industrial-grade qualification.
The DS90LV019TMX/NOPB belongs to TI's LVDS interface product line, designed specifically for noise-immune, high-speed, low-power point-to-point digital interconnects in factory automation, test equipment, and imaging systems.
FAQ
What supply voltages does the DS90LV019TMX/NOPB support?
The DS90LV019TMX/NOPB operates from either a 3.3 V ±0.3 V supply (3.0–3.6 V) or a 5.0 V ±0.5 V supply (4.5–5.5 V). It does not support intermediate voltages like 3.6 V or 4.0 V outside those ranges. Both supply configurations are fully characterized in the datasheet for DC and AC parameters, including ICC, VOD, and propagation delay. DS90LV019TMX/NOPB must be powered from one supply rail only - dual-supply operation is not supported.
Can the DS90LV019TMX/NOPB operate in full-duplex mode?
Yes, the DS90LV019TMX/NOPB supports full-duplex operation when DE = high and RE = low simultaneously, allowing concurrent transmission on DO± and reception on RI±/ROUT. This is confirmed in Table 1 (Functional Table) and validated by independent enable controls. DS90LV019TMX/NOPB does not require external handshaking or direction control logic, making it ideal for bidirectional serial links in compact industrial modules.
What is the receiver's common-mode input range for DS90LV019TMX/NOPB?
The DS90LV019TMX/NOPB receiver accepts differential inputs over a ±1 V common-mode voltage range, meaning RI+ and RI− may each swing from −1 V to +1 V relative to GND while maintaining valid operation. This wide range accommodates ground potential differences between boards or cables and is explicitly specified in the "Recommended Operating Conditions" table. DS90LV019TMX/NOPB maintains ±100 mV threshold sensitivity across this entire span.
Does DS90LV019TMX/NOPB require external termination resistors?
Yes, DS90LV019TMX/NOPB requires a 100 Ω differential termination resistor across RI+ and RI− at the receiver end to match standard LVDS transmission lines. The device itself does not integrate termination. For fail-safe operation with open inputs, Figure 10 in the datasheet shows optional external resistors (R1 to VCC, R2 to GND) to bias ROUT high - DS90LV019TMX/NOPB guarantees this behavior without them, but external bias improves robustness in unterminated scenarios.
Is DS90LV019TMX/NOPB pin-compatible with other LVDS transceivers?
No documented pin-compatible replacements exist for DS90LV019TMX/NOPB. Its 14-pin SOIC layout with flow-through assignment (e.g., DIN at pin 2, DE at pin 1, ROUT at pin 4) is unique to this family. Substitutes like SN65LVDS1 or MAX3045E use different pinouts and functional allocations. DS90LV019TMX/NOPB must be laid out per its specific pin map; migration requires PCB redesign unless using identical National Semiconductor/TI second-sources (e.g., DS90LV019TMTCX/NOPB in TSSOP).
DS90LV019TMX/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 14-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Transceiver
- Protocol:
- LVDS
- Number of Drivers/Receivers:
- 1/1
- Duplex:
- Full
- Receiver Hysteresis:
- -
- Data Rate:
- 100Mbps
- Voltage - Supply:
- 3V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SOIC
DS90LV019TMX/NOPB FAQ
1.How can I place an order for DS90LV019TMX/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for DS90LV019TMX/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS90LV019TMX/NOPB reliable?
The price and inventory of DS90LV019TMX/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS90LV019TMX/NOPB is usually 5 days.
3.What payment methods are accepted for DS90LV019TMX/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS90LV019TMX/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS90LV019TMX/NOPB?
DS90LV019TMX/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS90LV019TMX/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS90LV019TMX/NOPB?
For technical support, including DS90LV019TMX/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS90LV019TMX/NOPB requirements.
6.How does Aetrix verify that DS90LV019TMX/NOPB is sourced from the original manufacturer or authorized distributors?
All DS90LV019TMX/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS90LV019TMX/NOPB meets industry standards.
7.What is the process for return or replacement of DS90LV019TMX/NOPB?
All DS90LV019TMX/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with DS90LV019TMX/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS90LV019TMX/NOPB part is unused and in its original packaging.
Return procedure for DS90LV019TMX/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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