Texas Instruments DS90UB903QSQ/NOPB

Overview

DS90UB903QSQ/NOPB from Texas Instruments is an automotive-grade FPD-Link III serializer IC that converts 21-bit parallel RGB666 + HS/VS/DE video data and bidirectional I²C control into a single high-speed differential stream. It supports 10–43 MHz PCLK, delivers 210–903 Mbps throughput over one shielded twisted-pair, and operates from a single 1.8V supply with 1.8V/3.3V-compatible I/O. It enables compact, low-EMI display interconnects in central information displays.

For engineers reviewing the DS90UB903QSQ/NOPB datasheet, DS90UB903QSQ/NOPB pinout, DS90UB903QSQ/NOPB application, or DS90UB903QSQ/NOPB equivalent, key selection considerations include its 40-pin WQFN package, embedded clock architecture for AC-coupled links, LOCK output for link integrity monitoring, programmable receive equalization (on deserializer side), and AEC-Q100 Grade 2 qualification for automotive display systems.

Technical Context

The DS90UB903QSQ/NOPB implements a PLL-based clock recovery and CML transmitter to serialize 21-bit parallel video and control data onto a single differential pair using DC-balanced 8b/10b encoding. Its bidirectional control channel operates as an I²C-compliant bus over the same physical link, supporting master/slave mode selection via MODE pin and device addressing via ID[x] resistor network.

It integrates on-die termination (80–120 Ω) for both CML outputs and accepts 1.8V or 3.3V LVCMOS I/O levels. The serializer features programmable TRFB register for input timing alignment, BISTEN-triggered at-speed link diagnostics, and LOCK reporting - all optimized for driving up to 10 meters of shielded cable in harsh automotive environments.

Key Specifications

Pinout & Package

DS90UB903QSQ/NOPB is housed in a 40-pin WQFN package (Texas Instruments package code RTA0040A) with exposed thermal pad (DAP) requiring ≥16 vias to ground plane. The package supports automated optical inspection and reflow-compatible assembly.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar FPD-Link III serializer applications.

Compared with DS90UB903QSQ/NOPB, DS90UB913QSQ/NOPB offers higher bandwidth and integrated spread-spectrum control but requires updated driver software and PCB layout. MAX9276A+MAX9277A provides greater flexibility in timing and diagnostics but introduces dual-chip complexity and non-TI ecosystem dependencies.

Availability

DS90UB903QSQ/NOPB is available at Aetrix Electronics and suitable for automotive display systems, central information displays, and rear-seat entertainment modules requiring stable component supply, AEC-Q100 compliance, and long-cable FPD-Link III interoperability.

Supply support for DS90UB903QSQ/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity solutions for automotive, industrial, and consumer markets.

The DS90UB903QSQ/NOPB belongs to TI's FPD-Link III automotive serializer family, designed specifically to replace bulky parallel video interfaces in automotive displays with robust, low-EMI, single-pair differential links.

FAQ

What is the primary function of the DS90UB903QSQ/NOPB in an automotive display system?

The DS90UB903QSQ/NOPB serves as an FPD-Link III serializer that converts 21-bit parallel video data (RGB666 + HS/VS/DE) and bidirectional I²C control signals into a single high-speed differential stream for transmission over one shielded twisted-pair cable. In automotive systems, it enables compact, low-EMI interconnects between graphics processors and display modules - a core function confirmed in TI's SNLS332E datasheet and typical application diagrams.

Does the DS90UB903QSQ/NOPB require an external reference clock on the deserializer side?

No, the DS90UB903QSQ/NOPB does not require an external reference clock on the deserializer side. Its embedded clock architecture recovers timing directly from the serial data stream, eliminating the need for a separate clock line or crystal oscillator at the display end. This capability is explicitly stated in the datasheet's "Features" section and validated in Figure 1 (Typical Application Diagram), where DS90UB904Q receives only DOUT+/DOUT− and generates PCLK internally.

How does the LOCK pin on the DS90UB903QSQ/NOPB function, and what does it indicate?

The LOCK pin on the DS90UB903QSQ/NOPB is an LVCMOS output that asserts high when the internal PLL achieves lock to the incoming pixel clock (PCLK). It indicates stable clock recovery and readiness of serialized data transmission. Per the datasheet, LOCK = H confirms functional link integrity - a critical signal for display initialization sequences and fault detection in automotive systems. The pin is directly tied to system-level status monitoring in central information displays.

Can the DS90UB903QSQ/NOPB operate with both 1.8V and 3.3V I/O voltages, and how is this configured?

Yes, the DS90UB903QSQ/NOPB supports both 1.8V and 3.3V LVCMOS I/O levels. VDDIO can be connected to either 1.8V ±5% or 3.3V ±10%, and the I/O buffers automatically adapt - no configuration register setting is required. Electrical characteristics tables in the datasheet specify VIH/VIL thresholds and drive strength for both voltage domains, confirming dual-voltage compatibility for interfacing with diverse host controllers and timing ICs.

What is the maximum cable length supported by the DS90UB903QSQ/NOPB, and what conditions enable this performance?

The DS90UB903QSQ/NOPB supports up to 10 meters of shielded twisted-pair cable when paired with the DS90UB904Q deserializer, which provides programmable receive equalization to compensate for channel loss. This performance is validated at 43 MHz PCLK with worst-case bit error rate testing, as documented in TI's SNLS332E datasheet Section 1. Key enablers include embedded clock recovery, DC-balanced encoding, and CML driver specifications (268–412 mV differential output) optimized for long-reach automotive harnesses.