Texas Instruments DS90UB913QSQE/NOPB
- Part No.:
- DS90UB913QSQE/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Serializers, Deserializers
- Package:
- 32-WFQFN Exposed Pad
- Datasheet:
-
DS90UB913QSQE/NOPB.pdf
- Description:
- IC SER/DES 10-100MHZ FPD 32WQFN
- Quantity:
- Payment:

- Shipping:

Inventory:606
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
DS90UB913QSQE/NOPB from Texas Instruments is an automotive-grade FPD-Link III serializer IC for camera interface applications, converting 10- or 12-bit parallel video data (with HSYNC/VSYNC) into a high-speed serial stream over a single differential pair. It supports 10–100 MHz pixel clock input, features four programmable GPOs, bidirectional I²C-compatible control channel, and operates from 1.8-V core supply with 1.8/2.8/3.3-V I/O flexibility. Used in front/rear-view ADAS cameras.
For engineers reviewing the DS90UB913QSQE/NOPB datasheet, DS90UB913QSQE/NOPB pinout, DS90UB913QSQE/NOPB application, or DS90UB913QSQE/NOPB equivalent, key selection considerations include PCLK frequency range (10–100 MHz), 10-/12-bit payload mode configuration, GPO/CLKIN/CLKOUT functionality, WQFN-32 package thermal performance (RθJA = 38.4°C/W), and AEC-Q100 Grade 2 qualification for automotive ECU environments.
Technical Context
The DS90UB913QSQE/NOPB implements embedded-clock FPD-Link III with DC-balanced encoding to enable AC-coupled STP interconnects up to 25 meters. Its serializer architecture accepts parallel LVCMOS inputs (DIN[0:11], HSYNC, VSYNC, PCLK) and drives CML differential outputs (DOUT+, DOUT–) while embedding bidirectional control data via the same physical link using time-division multiplexing.
It integrates a 1.8-V PLL with adaptive lock detection (LOCK output), supports external oscillator mode via CLKIN/GPO[3] and CLKOUT/GPO[2], and includes MODE pin-selectable operation modes (10-bit up to 100 MHz or 12-bit up to 75 MHz). The device provides programmable spread-spectrum clock generation only on the deserializer side - not on DS90UB913QSQE/NOPB itself.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| PCLK Range | 10 MHz to 100 MHz - determines maximum supported resolution/frame rate; 10-bit mode enables full 100 MHz, 12-bit mode capped at 75 MHz. |
| Data Width | 10-bit or 12-bit configurable - selects pixel depth; 12-bit supports higher dynamic range imaging at reduced clock rates. |
| I/O Voltage Support | 1.8 V / 2.8 V / 3.3 V - allows direct interfacing with diverse sensor and processor I/O domains without level shifters. |
| Package | 32-pin WQFN (5.0 mm × 5.0 mm) - compact footprint suitable for space-constrained camera modules; exposed DAP requires ≥9 vias to ground. |
| Automotive Qualification | AEC-Q100 Grade 2 (−40°C to +105°C) - validated for under-hood and cabin-mounted ADAS camera systems. |
| ESD Robustness | ±8 kV HBM, ±7 kV IEC 61000-4-2 contact - ensures reliability in manufacturing and field deployment with minimal external protection. |
| Supply Current | 61–80 mA typical (10-bit @ 100 MHz) - enables accurate power budgeting for multi-camera ECU designs. |
Pinout & Package
DS90UB913QSQE/NOPB uses a 32-pin WQFN package (5.0 mm × 5.0 mm, RTV suffix) with exposed thermal pad (DAP) requiring grounding via ≥9 vias. Pin functions are defined per TI SNLS420D Rev D datasheet.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| DIN[0:11] | Parallel data input | Accepts 10- or 12-bit LVCMOS video data; pins 19–24, 26–27, 29–32 - pulldown-enabled for bus idle stability. |
| PCLK, HSYNC, VSYNC | Timing input | LVCMOS inputs with pulldowns; strobe edge set by TRFB register - critical for sync alignment with imager output. |
| GPO[0:3] | Configurable I/O | GPO[0:1] mirror deserializer GPIOs; GPO[2] doubles as CLKOUT; GPO[3] doubles as CLKIN - enables external oscillator integration. |
| SCL / SDA | Bidirectional control bus | I²C-compatible open-drain lines for register access and status reporting; require external pullups to VDDIO. |
| MODE | Function configuration | Selects PCLK source (imager vs. external oscillator); resistor-to-ground with 10-kΩ pullup to 1.8 V rail. |
| PDB | Power-down control | Active-low enable; pulls PLL offline and resets registers when low - reduces IDD to minimum during idle. |
| DOUT+/DOUT− | FPD-Link III output | CML differential outputs; must be AC-coupled with 100-nF capacitors - defines serial link integrity and EMI behavior. |
Key Features
| Feature | Design Value |
|---|---|
| Single-pair FPD-Link III interface | Replaces 20+ parallel traces with one shielded twisted pair - reduces cable cost, weight, and EMI emissions in camera harnesses. |
| Embedded clock + DC-balanced coding | Enables AC-coupled interconnects without baseline wander - eliminates large DC-blocking capacitors and simplifies connector design. |
| Programmable 10-/12-bit payload | Allows system-level trade-off between resolution (12-bit) and frame rate (100 MHz @ 10-bit) - optimized per camera use case. |
| Four GPOs with clock routing capability | GPO[2]/GPO[3] support external oscillator mode - removes need for separate clock generator in cost-sensitive camera modules. |
| AT-speed BIST & LOCK output | Validates link integrity in real time; LOCK pin indicates PLL lock status - enables fail-safe diagnostics in ASIL-B systems. |
Applications
| Front-View Collision Mitigation | Rear-View Backup Camera |
|---|---|
Use Scenario: High-resolution forward-facing camera feeding object detection algorithms in ADAS ECUs. IC Role / Device Role / Timing Role: Serializer capturing 12-bit raw image data at 75 MHz and transmitting over STP to central vision processor. Use Value: Enables 1.3 MP+ resolution at 30 fps with low-latency bidirectional control for auto-exposure and focus commands. |
Use Scenario: Rear-mounted wide-angle camera providing real-time video to infotainment display during parking maneuvers. IC Role / Device Role / Timing Role: Serializer converting 10-bit YUV422 data at 100 MHz into robust serial stream across vehicle harness. Use Value: Reduces cabling complexity and improves EMC immunity compared to parallel LVDS interfaces in noisy rear-chassis environment. |
| Surround-View Parking System | Driver Monitoring System (DMS) |
Use Scenario: Multi-camera fusion system combining four camera feeds into 360° bird's-eye view for automated parking assist. IC Role / Device Role / Timing Role: One DS90UB913QSQE/NOPB per camera head, synchronized via shared PCLK and control bus. Use Value: Ensures deterministic latency and frame alignment across all four channels using common-mode timing references. |
Use Scenario: In-cabin infrared camera tracking driver gaze, blink rate, and head pose for fatigue detection. IC Role / Device Role / Timing Role: Serializer handling low-light 12-bit monochrome sensor output with precise VSYNC-aligned exposure control. Use Value: Maintains sub-millisecond timing accuracy for eye-tracking algorithms via embedded sync signals and low-jitter PLL. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serializer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS90UB913A-Q1 | Supports coax or STP media; higher PCLK min (25 MHz) and no 10–24 MHz range; identical pinout and register map. | Targeted for longer-distance (>15 m) or EMI-critical coax deployments; not suitable for low-frequency 10–24 MHz imager interfaces. | Select DS90UB913A-Q1 only if coaxial cable is used or PCLK ≥25 MHz is guaranteed; otherwise DS90UB913QSQE/NOPB is preferred. |
| MAX96705GTJ+T | Maxim Integrated GMSL2 serializer; 1.5 Gbps, 10-/12-bit, supports 100+ MHz PCLK; different pinout and register interface. | Used in higher-bandwidth applications (e.g., 4K streaming) and systems already standardized on GMSL2 ecosystem. | Choose MAX96705GTJ+T only when migrating to GMSL2 infrastructure or requiring >100 MHz PCLK; not drop-in compatible. |
Compared with DS90UB913A-Q1 and MAX96705GTJ+T, DS90UB913QSQE/NOPB uniquely supports the full 10–100 MHz PCLK range in a pin-compatible AEC-Q100 Grade 2 package, making it optimal for cost-sensitive, flexible-resolution automotive camera designs where STP is standard.
Availability
DS90UB913QSQE/NOPB is available at Aetrix Electronics and suitable for front-view collision mitigation, surround-view parking assistance, driver monitoring systems, and rear-view backup camera applications requiring stable component supply across automotive production lifecycles.
Supply support for DS90UB913QSQE/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions with deep automotive expertise and broad manufacturing scale.
DS90UB913QSQE/NOPB belongs to TI's FPD-Link III automotive serializer family, designed specifically to replace bulky parallel video interfaces in ADAS camera modules while meeting stringent AEC-Q100, ISO 10605, and EMC requirements.
FAQ
What is the maximum pixel clock frequency supported by DS90UB913QSQE/NOPB?
The DS90UB913QSQE/NOPB supports pixel clock frequencies from 10 MHz to 100 MHz. At 100 MHz, it operates in 10-bit payload mode; for 12-bit operation, the maximum PCLK is 75 MHz. This dual-mode capability allows system designers to select resolution versus frame rate based on imager specifications and bandwidth requirements in the DS90UB913QSQE/NOPB application.
Does DS90UB913QSQE/NOPB support external oscillator mode?
Yes, DS90UB913QSQE/NOPB supports external oscillator mode using GPO[3]/CLKIN and GPO[2]/CLKOUT pins. When configured via the MODE pin, the serializer synchronizes to an external clock instead of the imager's PCLK - enabling precise timing control in multi-camera systems where a master clock is distributed. This functionality is documented in the DS90UB913QSQE/NOPB Applications Information section.
How many general-purpose I/O pins does DS90UB913QSQE/NOPB provide?
DS90UB913QSQE/NOPB provides four dedicated general-purpose I/O pins: GPO[0], GPO[1], GPO[2]/CLKOUT, and GPO[3]/CLKIN. These can be configured as outputs mirroring deserializer GPIO states or as clock inputs/outputs in external oscillator mode. All GPOs are LVCMOS-compatible and support 1.8/2.8/3.3-V operation - confirmed in the DS90UB913QSQE/NOPB pin function table.
Is DS90UB913QSQE/NOPB qualified for automotive use?
Yes, DS90UB913QSQE/NOPB is AEC-Q100 Grade 2 qualified (−40°C to +105°C ambient), ISO 10605 and IEC 61000-4-2 ESD compliant, and designed for electronic control units in safety-critical ADAS applications. Its qualification covers thermal, vibration, and electrical stress testing per automotive standards - explicitly stated in the DS90UB913QSQE/NOPB device information table.
What package type and dimensions does DS90UB913QSQE/NOPB use?
DS90UB913QSQE/NOPB uses a 32-pin WQFN package (Texas Instruments part number suffix RTV) with nominal body size 5.00 mm × 5.00 mm and 0.5-mm pitch. It includes an exposed thermal pad (DAP) that must be connected to ground with at least nine vias - specified in the DS90UB913QSQE/NOPB mechanical drawing and packaging information.
DS90UB913QSQE/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 32-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Serializer
- Data Rate:
- 1.4Gbps
- Input Type:
- LVCMOS
- Output Type:
- FPD-Link III, LVDS
- Number of Inputs:
- 12
- Number of Outputs:
- 1
- Voltage - Supply:
- 1.71V ~ 1.89V, 3V ~ 3.6V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-WQFN (5x5)
DS90UB913QSQE/NOPB FAQ
1.How can I place an order for DS90UB913QSQE/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for DS90UB913QSQE/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS90UB913QSQE/NOPB reliable?
The price and inventory of DS90UB913QSQE/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS90UB913QSQE/NOPB is usually 5 days.
3.What payment methods are accepted for DS90UB913QSQE/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS90UB913QSQE/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS90UB913QSQE/NOPB?
DS90UB913QSQE/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS90UB913QSQE/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS90UB913QSQE/NOPB?
For technical support, including DS90UB913QSQE/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS90UB913QSQE/NOPB requirements.
6.How does Aetrix verify that DS90UB913QSQE/NOPB is sourced from the original manufacturer or authorized distributors?
All DS90UB913QSQE/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS90UB913QSQE/NOPB meets industry standards.
7.What is the process for return or replacement of DS90UB913QSQE/NOPB?
All DS90UB913QSQE/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with DS90UB913QSQE/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS90UB913QSQE/NOPB part is unused and in its original packaging.
Return procedure for DS90UB913QSQE/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DS90UB913QSQE/NOPB Tags

-
SN65HVS880PWPR
Texas Instruments

-
SN65HVS882PWPR
Texas Instruments

-
FIN3386MTDX
onsemi

-
FIN3385MTDX
onsemi

-
SN65LV1023ARHBR
Texas Instruments

-
SN65LV1023ADBR
Texas Instruments

-
SN65LV1224BDBR
Texas Instruments

-
SN65LVDS93ADGGR
Texas Instruments

-
SN65LVDS93DGGR
Texas Instruments

-
TDES954RGZT
Texas Instruments

-
SN65LV1224BRHBT
Texas Instruments

-
DS90UB914QSQE/NOPB
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

