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Texas Instruments DS90UB924TRHSRQ1
- Part No.:
- DS90UB924TRHSRQ1
- Manufacturer:
- Texas Instruments
- Category:
- Serializers, Deserializers
- Package:
- 48-WFQFN Exposed Pad
- Datasheet:
-
DS90UB924TRHSRQ1.pdf
- Description:
- IC SERIALIZER 720P 48WQFN
- Quantity:
- Payment:
- Shipping:
Inventory:4,747
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Product details
Overview
DS90UB924TRHSRQ1 from Texas Instruments is an AEC-Q100 Grade 2 automotive-qualified FPD-Link III deserializer that converts a single-pair AC-coupled high-speed serial stream (5–96 MHz pixel clock) into four LVDS data lanes, one LVDS clock pair (OpenLDI), and up to four I2S audio channels. It supports RGB888 + HS/VS/DE timing and operates from a single 3.3-V supply with 1.8-V/3.3-V LVCMOS I/O compatibility. Used in automotive infotainment display links.
For engineers reviewing the DS90UB924TRHSRQ1 datasheet, DS90UB924TRHSRQ1 pinout, DS90UB924TRHSRQ1 application, or DS90UB924TRHSRQ1 equivalent, key selection criteria include its 7.0 mm × 7.0 mm WQFN-48 package, adaptive cable equalization for 100Ω STP, bidirectional I²C control channel, and integrated BIST for link integrity verification in safety-critical display interconnects.
Technical Context
The DS90UB924TRHSRQ1 implements an FPD-Link III receiver with adaptive input equalization to compensate for transmission losses over long cables, enabling robust operation with 100Ω STP up to several meters. Its internal PLL locks to the embedded clock in the serialized stream and regenerates low-jitter LVDS outputs (TxCLKOUT±, TxOUT[3:0]±) compliant with OpenLDI standards.
It integrates a bidirectional I²C-compatible control channel for configuration and status reporting, four configurable I2S digital audio outputs (MCLK, I2S_CLK, I2S_WC, I2S_DA–DB), and eight GPIOs-four shared with I2S signals and four register-access-only-supporting flexible host processor interfacing in automotive display systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| PCLK Range | 5 MHz to 96 MHz - supports 720p HD video with precise pixel timing alignment across all output lanes |
| Input Interface | Single-pair AC-coupled FPD-Link III - reduces EMI and simplifies routing versus parallel buses; requires 0.1 µF AC coupling caps on RIN± |
| Output Interface | LVDS OpenLDI (TxCLKOUT± + TxOUT[3:0]±) - delivers RGB888 + HS/VS/DE with 100 Ω differential termination required per lane |
| I/O Voltage | 1.8 V or 3.3 V LVCMOS - selectable via VDDIO supply; supports mixed-voltage host processor interfaces without level shifters |
| ESD Rating | ±8 kV HBM, ±1.25 kV CDM - meets AEC-Q100 Grade 2 requirements for automotive cabin environments |
| Power Supply | Single 3.3 V (VDD33_A/B) with dedicated decoupling - mandates four 4.7 µF capacitors at CAPLV12/CAPR12/CAPP12/CAPL12 plus two at CAPLV25/CAPI2S |
| Thermal Resistance | RθJA = 26.4 °C/W - enables operation up to +105°C ambient with standard PCB copper pour and thermal vias to DAP |
Pinout & Package
DS90UB924TRHSRQ1 is housed in a thermally enhanced 48-pin WQFN package (7.0 mm × 7.0 mm, 0.4 mm pitch) with exposed thermal pad (DAP) requiring ≥9 vias to ground plane. Pin functions are validated per TI SNLS512 datasheet Rev. APRIL 2016.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RIN+, RIN− | FPD-Link III differential input | AC-coupled receiver inputs; require 0.1 µF series capacitors and internal 100 Ω termination |
| TxCLKOUT+, TxCLKOUT− | LVDS OpenLDI clock output | Regenerated pixel clock pair; must be terminated with 100 Ω differential load for valid LVDS levels |
| TxOUT[3:0]+, TxOUT[3:0]− | LVDS OpenLDI data outputs | Four 8-bit RGB data lanes; each pair requires external 100 Ω differential termination |
| SCL, SDA | I²C control interface | Open-drain bidirectional bus; require 4.7 kΩ pullups to VDD33 for reliable communication with host processor |
| LOCK, PASS | Status outputs | LOCK = active-high PLL lock indicator; PASS = active-low BIST pass/fail flag for production test and diagnostics |
| PDB | Power-down control | Active-high enable; must be driven or pulled up to VDD33; asserts tri-state outputs and shuts down PLL when low |
Key Features
| Feature | Design Value |
|---|---|
| Adaptive cable equalization | Compensates for frequency-dependent loss in 100Ω STP cables up to 10+ meters, maintaining signal integrity without manual tuning |
| Bidirectional I²C control channel | Enables full register read/write access and real-time status monitoring (e.g., LOCK, PASS) over same FPD-Link III pair used for video |
| Integrated BIST engine | Generates and verifies PRBS patterns to validate link health during startup or diagnostics-no external test equipment needed |
| Four I2S audio outputs | Supports stereo + surround sound (e.g., 5.1) by delivering independent I2S streams (I2S_DA–DB) synchronized to MCLK and I2S_WC |
| Configurable LVDS mapping | MAPSEL pin selects MSB-first or LSB-first bit ordering on TxOUT3±, ensuring compatibility with diverse display timing controllers |
| Backward compatibility modes | MODE_SEL resistor divider enables interoperability with legacy DS90UB921-Q1 and other TI serializers in field-upgrade scenarios |
Applications
| Automotive Touch Screen Display | Automotive Instrument Cluster |
|---|---|
|
Use Scenario: High-reliability video link between head unit and center-stack touchscreen in passenger compartment. IC Role / Device Role / Timing Role: Deserializes FPD-Link III stream from DS90UB921-Q1 serializer into OpenLDI RGB888 + HS/VS/DE for display controller. Use Value: Enables lightweight 1-pair STP cabling instead of bulky parallel RGB traces, reducing harness weight and EMI susceptibility. |
Use Scenario: Driving TFT LCD in digital instrument cluster with strict latency and jitter requirements. IC Role / Device Role / Timing Role: Converts serialized video to low-skew LVDS OpenLDI while providing I2S audio for driver alerts. Use Value: Delivers <65 ps cycle-to-cycle jitter on TxCLKOUT±, meeting automotive display timing stability specs. |
| Automotive Display for Navigation | Head-Up Display (HUD) Video Interface |
|
Use Scenario: Transmitting navigation graphics from SoC to dashboard-mounted display with minimal latency. IC Role / Device Role / Timing Role: Receives FPD-Link III video and forwards DE/HS/VS timing signals alongside RGB data to display timing controller. Use Value: Supports 96 MHz PCLK for full 720p@60 fps resolution with <147× pixel clock latency (tDD), preserving real-time responsiveness. |
Use Scenario: Interfacing compact HUD module requiring low-power, low-EMI video transport. IC Role / Device Role / Timing Role: Provides DC-balanced, scrambled OpenLDI output with embedded clock recovery to eliminate skew-sensitive parallel clocks. Use Value: Eliminates separate pixel clock routing; uses same differential pair for data and timing, simplifying optical engine layout. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar FPD-Link III deserializer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS90UB926TRHBRQ1 | Same WQFN-48 package; adds eDP-compatible output mode and higher 125 MHz PCLK support | Targeted at next-gen displays requiring eDP fallback or >96 MHz bandwidth | Select if future-proofing for eDP or >720p resolution is required; otherwise DS90UB924TRHSRQ1 offers optimal cost/performance for 720p automotive |
| DS90UB948TRGZRQ1 | 48-pin VQFN; supports dual-link FPD-Link III (two serialized inputs) and 10-bit color depth | Used in dual-display or high-color-depth instrument clusters where two independent video streams are needed | Choose only when dual-input capability or 10-bit RGB is mandatory; DS90UB924TRHSRQ1 remains preferred for single-link 8-bit 720p systems |
Compared with DS90UB926TRHBRQ1 and DS90UB948TRGZRQ1, DS90UB924TRHSRQ1 provides the most cost-effective, pin-compatible solution for single-link 720p automotive displays with integrated I2S audio and BIST-without over-specifying for eDP or dual-input needs.
Availability
DS90UB924TRHSRQ1 is available at Aetrix Electronics and suitable for automotive touch screen displays, instrument clusters, and navigation systems requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for DS90UB924TRHSRQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and automotive ICs, with decades of expertise in high-reliability interface solutions.
The DS90UB924TRHSRQ1 belongs to TI's FPD-Link III automotive serializer/deserializer family, designed specifically to replace bulky parallel video interfaces with robust, EMI-resistant, single-pair differential links for automotive displays.
FAQ
What is the operating temperature range for DS90UB924TRHSRQ1?
The DS90UB924TRHSRQ1 is qualified per AEC-Q100 Grade 2 with an ambient operating temperature range of –40°C to +105°C. This rating ensures reliable operation in automotive cabin environments including under-hood proximity and dashboard mounting locations where thermal stress is significant. All electrical specifications in the datasheet are guaranteed across this full range.
Does DS90UB924TRHSRQ1 support both 1.8-V and 3.3-V LVCMOS I/O simultaneously?
No-DS90UB924TRHSRQ1 supports either 1.8-V or 3.3-V LVCMOS I/O, selected by the voltage applied to the VDDIO pin. The device does not support mixed-voltage operation on its GPIOs or control pins. When VDDIO = 1.8 V, all LVCMOS inputs must meet 1.8-V logic thresholds; when VDDIO = 3.3 V, they follow 3.3-V thresholds. VDDIO must not exceed VDD33 by more than 300 mV.
How is the DS90UB924TRHSRQ1 powered, and what decoupling is required?
DS90UB924TRHSRQ1 requires a single 3.3-V supply applied to VDD33_A and VDD33_B pins, plus a separate VDDIO supply for I/O logic. Each VDD33 pin needs a 4.7-µF capacitor to GND. Additionally, six regulator decoupling pins (CAPLV12, CAPR12, CAPP12, CAPLV25, CAPI2S, CAPL12) each require a 4.7-µF capacitor-CAPL12 needs two-to ensure stable internal LDO regulation and low-noise operation.
Can DS90UB924TRHSRQ1 drive standard OpenLDI displays directly?
Yes-DS90UB924TRHSRQ1 outputs conform to OpenLDI electrical standards: TxCLKOUT± and TxOUT[3:0]± deliver LVDS-compliant differential signals with programmable swing (400–600 mVp-p) and require only external 100-Ω differential termination per pair. No level-shifting or signal conditioning is needed to interface with OpenLDI-compliant display timing controllers.
What diagnostic capabilities does DS90UB924TRHSRQ1 provide?
DS90UB924TRHSRQ1 includes hardware-based diagnostics: the LOCK pin indicates PLL lock status in real time, and the PASS pin reports BIST (Built-In Self-Test) results-low = error detected, high = error-free transmission. These signals enable automated link validation during boot or periodic system health checks without host software intervention.
DS90UB924TRHSRQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 48-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Deserializer
- Data Rate:
- -
- Input Type:
- LVCMOS
- Output Type:
- LVDS
- Number of Inputs:
- 4
- Number of Outputs:
- 4
- Voltage - Supply:
- 3V ~ 3.6V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-WQFN (7x7)
DS90UB924TRHSRQ1 FAQ
1.How can I place an order for DS90UB924TRHSRQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for DS90UB924TRHSRQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS90UB924TRHSRQ1 reliable?
The price and inventory of DS90UB924TRHSRQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS90UB924TRHSRQ1 is usually 5 days.
3.What payment methods are accepted for DS90UB924TRHSRQ1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS90UB924TRHSRQ1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS90UB924TRHSRQ1?
DS90UB924TRHSRQ1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS90UB924TRHSRQ1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS90UB924TRHSRQ1?
For technical support, including DS90UB924TRHSRQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS90UB924TRHSRQ1 requirements.
6.How does Aetrix verify that DS90UB924TRHSRQ1 is sourced from the original manufacturer or authorized distributors?
All DS90UB924TRHSRQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS90UB924TRHSRQ1 meets industry standards.
7.What is the process for return or replacement of DS90UB924TRHSRQ1?
All DS90UB924TRHSRQ1 units undergo pre-shipment inspection (PSI). If there is an issue with DS90UB924TRHSRQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS90UB924TRHSRQ1 part is unused and in its original packaging.
Return procedure for DS90UB924TRHSRQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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