Texas Instruments DS90UB925QSQE/NOPB

Overview

DS90UB925QSQE/NOPB from Texas Instruments is an automotive-grade FPD-Link III serializer IC that converts 24-bit RGB parallel video (R[7:0]/G[7:0]/B[7:0]), HS/VS/DE timing signals, and stereo I2S audio into a single AC-coupled differential serial stream. It operates at 5–85 MHz PCLK, supports 720p resolution, embeds clock and DC-balanced scrambled data, and delivers up to 2.975 Gbps line rate over STP cable up to 10 meters - used in automotive display systems such as navigation and rear-seat entertainment.

For engineers reviewing the DS90UB925QSQE/NOPB datasheet, DS90UB925QSQE/NOPB pinout, DS90UB925QSQE/NOPB application, or DS90UB925QSQE/NOPB equivalent, key selection considerations include its AEC-Q100 Grade 2 qualification, bidirectional I²C control channel, LVCMOS I/O voltage flexibility (1.8 V or 3.3 V), integrated CML driver with 0.1 µF AC coupling, and compatibility with DS90UB926Q-Q1 deserializer for end-to-end HD video transmission.

Technical Context

The DS90UB925QSQE/NOPB implements a 35-bit symbol structure containing embedded clock, video control bits (HS/VS/DE), 24-bit RGB data, and I2S audio - all DC-balanced and scrambled for robust AC-coupled transmission. Its PLL locks to PCLK input (5–85 MHz) and generates a high-speed CML serial output with programmable de-emphasis.

It integrates a dual-voltage LVCMOS interface (VDDIO = 1.8 V ±5% or 3.3 V), configurable GPIOs (in 18-bit mode), and a dedicated I²C master/slave control channel (SCL/SDA) with device ID selection (IDx). The serializer supports remote power-down via PDB pin and provides interrupt status via open-drain INTB output.

Key Specifications

Pinout & Package

DS90UB925QSQE/NOPB uses a 48-pin WQFN package (7.0 mm × 7.0 mm) with exposed thermal pad (DAP) requiring ≥9 vias to ground plane. Pin functions are validated per TI SNLS407D datasheet Rev D.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar FPD-Link III serializer applications.

Compared with DS90UB925Q-Q1 and DS90UB953QSQE/NOPB, the DS90UB925QSQE/NOPB offers optimal balance of 720p capability, FPD-Link II backward compatibility, and AEC-Q100 qualification - making it the preferred choice for cost-sensitive, field-proven automotive display links where 85 MHz PCLK suffices.

Availability

DS90UB925QSQE/NOPB is available at Aetrix Electronics and suitable for automotive navigation displays, rear-seat entertainment systems, and driver assistance camera links requiring stable component supply, long-term lifecycle support, and AEC-Q100-compliant sourcing.

Supply support for DS90UB925QSQE/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and automotive electronics, with decades of experience in high-reliability interface solutions.

The DS90UB925QSQE/NOPB belongs to TI's FPD-Link III automotive serializer family, designed specifically for noise-immune, high-bandwidth video transport in safety-critical vehicle display and vision systems.

FAQ

What is the maximum supported pixel clock frequency for DS90UB925QSQE/NOPB?

The DS90UB925QSQE/NOPB supports PCLK frequencies from 5 MHz to 85 MHz, enabling transmission of 720p video at standard rates like 74.25 MHz. Operation above 85 MHz is not supported - attempting higher frequencies may cause serialization errors or loss of lock. The device's internal PLL and CML driver are characterized and guaranteed only within this range per TI SNLS407D datasheet Section 6.3.

Does DS90UB925QSQE/NOPB support backward compatibility with FPD-Link II deserializers?

Yes, DS90UB925QSQE/NOPB is explicitly backward compatible with DS90UR906Q and DS90UR908Q FPD-Link II deserializers, as confirmed in the datasheet's Description and Detailed Description sections. This allows reuse of existing deserializer hardware during upgrades. However, FPD-Link II mode disables certain features like I2S audio embedding and reduces maximum line rate to ~1.65 Gbps.

What are the required external components for DS90UB925QSQE/NOPB's CML output interface?

DS90UB925QSQE/NOPB requires two 0.1 µF AC-coupling capacitors (one on DOUT+, one on DOUT−), a 100 Ω differential termination at the deserializer end, and proper grounding of the CMF pin to GND via a 0.1 µF capacitor. The datasheet Figure 1 and Section 6.5 specify these values as mandatory for signal integrity and EMI compliance in automotive environments.

Can DS90UB925QSQE/NOPB operate with 1.8 V LVCMOS I/O voltage?

Yes, DS90UB925QSQE/NOPB supports VDDIO = 1.8 V ±5% (1.71–1.89 V), allowing direct interfacing with 1.8 V graphics processors or FPGAs. Input thresholds scale accordingly (VIH = 0.65×VDDIO, VIL = 0.35×VDDIO), and output drive strength is maintained per DC Electrical Characteristics Table 6.5. Both 1.8 V and 3.3 V modes are fully characterized and production-tested.

How does the MODE_SEL pin affect DS90UB925QSQE/NOPB functionality?

The MODE_SEL pin configures color depth and GPIO mapping: logic high selects 24-bit RGB mode (default), while logic low enables 18-bit mode with six shared pins repurposed as GPIO[3:0] and I2S_DB. This setting is latched at power-up and cannot be changed dynamically. The pin must be hard-wired - floating is undefined and violates recommended operating conditions per Section 6.3.