Texas Instruments DS90UB925QSQ/NOPB
- Part No.:
- DS90UB925QSQ/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Serializers, Deserializers
- Package:
- 48-WFQFN Exposed Pad
- Datasheet:
-
DS90UB925QSQ/NOPB.pdf
- Description:
- IC SERIALIZER FPD LINK11 48WQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
DS90UB925QSQ/NOPB from Texas Instruments is an automotive-grade FPD-Link III serializer that converts 24-bit RGB parallel video (R[7:0]/G[7:0]/B[7:0]), HS/VS/DE timing signals, and stereo I2S audio into a single AC-coupled differential serial stream. It operates at 5–85 MHz PCLK, supports 720p resolution, embeds clock and DC-balanced scrambled data, and delivers up to 2.975 Gbps line rate over one STP pair for automotive display links.
For engineers reviewing the DS90UB925QSQ/NOPB datasheet, DS90UB925QSQ/NOPB pinout, DS90UB925QSQ/NOPB application, or DS90UB925QSQ/NOPB equivalent, key selection considerations include its AEC-Q100 Grade 2 qualification, bidirectional I²C control channel, 1.8 V/3.3 V LVCMOS I/O flexibility, integrated PLL lock time (≤131×PCLK period), and compatibility with DS90UB926Q-Q1 deserializer in automotive infotainment and ADAS camera systems.
Technical Context
The DS90UB925QSQ/NOPB implements a 35-bit symbol structure containing embedded clock, 24-bit video payload, 3-bit control (HS/VS/DE), 2-bit audio sync, and 2-bit parity-enabling full-duplex bidirectional communication over a single CML differential pair. Its DC-balancing scrambler and AC-coupling support long cable runs (up to 10 m) while maintaining signal integrity.
It integrates a programmable PLL with lock detection (INTB), configurable GPIOs (GPIO[3:0] in 18-bit mode), and dual-power domain operation (VDD33 = 3.0–3.6 V; VDDIO = 1.71–1.89 V or 3.0–3.6 V). The device supports backward compatibility with FPD-Link II deserializers and includes low-power modes triggered via PDB pin.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| PCLK Range | 5–85 MHz - defines maximum supported video resolution (720p) and pixel throughput |
| Line Rate | Up to 2.975 Gbps - enables transmission of 24-bit RGB + timing + stereo I2S over single differential pair |
| Supply Voltages | VDD33 = 3.0–3.6 V; VDDIO = 1.71–1.89 V or 3.0–3.6 V - supports mixed-voltage system interfacing |
| ESD Rating | ±8 kV HBM, ±8 kV ISO 10605 - meets automotive robustness requirements for connector interfaces |
| Operating Temp | −40 °C to +105 °C - qualified per AEC-Q100 Grade 2 for under-hood and display module use |
| I²C Interface | Standard/Fast Mode (100/400 kHz) - enables configuration and status monitoring without dedicated MCU pins |
| PLL Lock Time | ≤131 × PCLK period - ensures rapid synchronization after power-up or wake-up events |
Pinout & Package
DS90UB925QSQ/NOPB uses a 48-pin WQFN package (7.0 mm × 7.0 mm) with exposed thermal pad (DAP) requiring ≥9 vias to ground plane. Pin functions are validated per TI SNLS407D Rev D datasheet.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| DIN[23:0] | Parallel video/audio input | Accepts 24-bit RGB + optional GPIO/I2S_DB; pull-down enabled by default |
| PCLK, HS, VS, DE | Video timing inputs | LVCMOS synchronous interface; minimum pulse width enforced per control filter setting |
| I2S_CLK/WC/DA | Stereo audio interface | Supports I2S master mode; pins double as GPO_REG[8:6] when configured |
| DOUT+/DOUT− | FPD-Link III serial output | CML differential outputs requiring 0.1 µF AC coupling and 100 Ω termination |
| SCL/SDA/IDx | I²C control bus | Open-drain interface with 4.7 kΩ pull-up; IDx sets slave address via voltage divider |
| PDB | Power-down control | Active-low enable; forces driver outputs HIGH and resets registers on assertion |
| INTB | Interrupt output | Open-drain status flag indicating PLL lock loss, register access error, or BIST completion |
| VDD33/VDDIO/GND | Power domains | VDD33 powers internal regulator; VDDIO sets I/O voltage level; DAP must connect to ground plane |
Key Features
| Feature | Design Value |
|---|---|
| Bidirectional I²C control channel | Enables real-time configuration and diagnostics without interrupting video stream or requiring additional MCU GPIOs |
| DC-balanced scrambling | Eliminates DC offset to support AC-coupled cabling up to 10 meters while reducing EMI and jitter accumulation |
| Backward FPD-Link II compatibility | Interoperates with legacy DS90UR906Q/908Q deserializers, easing migration in existing automotive platforms |
| Programmable GPIOs | Four configurable I/Os (GPIO[3:0]) usable for sideband signaling, sensor sync, or status indication in 18-bit mode |
| Low-power modes | PDB-driven shutdown reduces IDD to <2 mA; remote auto-power-down mode allows deserializer-initiated sleep |
Applications
| Automotive Navigation Display | Rear Seat Entertainment |
|---|---|
Use Scenario: High-resolution TFT-LCD panel driven from central infotainment head unit over harness wiring. IC Role / Device Role / Timing Role: Serializer converting GPU-generated RGB888 + HS/VS/DE into robust FPD-Link III stream for ECU-to-display link. Use Value: Replaces 30+ parallel wires with single twisted pair, reducing weight, EMI, and connector cost while supporting 720p@60 Hz. |
Use Scenario: Dual-screen video playback system in premium vehicle cabin with centralized media source. IC Role / Device Role / Timing Role: Parallel-to-serial bridge enabling simultaneous HD video and stereo audio transport across vehicle chassis. Use Value: Integrates I2S audio path within same serial link, eliminating separate audio cables and simplifying EMC filtering. |
| Driver Monitoring Camera Link | ADAS Rearview Camera System |
Use Scenario: Cabin-facing camera transmitting megapixel image data to driver attention ECU. IC Role / Device Role / Timing Role: Serializer capturing raw Bayer or YUV video with precise timing control for real-time processing. Use Value: Low-latency (<145×PCLK) transmission preserves frame alignment critical for gaze tracking algorithms. |
Use Scenario: Wide-angle rear camera feeding video to display or ADAS processor with minimal latency. IC Role / Device Role / Timing Role: High-reliability serializer operating in harsh temperature environments with AEC-Q100 Grade 2 compliance. Use Value: ±8 kV ESD protection on DOUT+/DOUT− ensures robustness against harness discharge events during service. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar FPD-Link III serializer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS90UB927QSQ/NOPB | Supports 1080p (100–112 MHz PCLK); adds MIPI CSI-2 input; higher power consumption | Required for full HD displays or camera sensors with MIPI output | Select when >85 MHz PCLK or native MIPI interface is needed; not drop-in compatible due to pinout and register map changes |
| DS90UB953QSQ/NOPB | Includes integrated HDCP 2.2 engine; supports 1080p; enhanced spread-spectrum clocking | Mandatory for secure content delivery (e.g., streaming video) in premium infotainment | Choose only if content protection is required; adds cryptographic overhead and licensing complexity |
Compared with DS90UB925QSQ/NOPB, DS90UB927QSQ/NOPB extends resolution capability but increases BOM cost and layout complexity, while DS90UB953QSQ/NOPB adds security features irrelevant to basic display links-making DS90UB925QSQ/NOPB optimal for cost-sensitive 720p automotive display applications requiring proven reliability and minimal integration effort.
Availability
DS90UB925QSQ/NOPB is available at Aetrix Electronics and suitable for automotive navigation displays, rear seat entertainment systems, and ADAS camera modules requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for DS90UB925QSQ/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and automotive ICs, with decades of experience in high-speed serial interface technology.
The DS90UB925QSQ/NOPB belongs to TI's FPD-Link III automotive serializer family, designed specifically for noise-immune, lightweight, high-bandwidth video transport between ECUs and displays/cameras in vehicles.
FAQ
What is the maximum supported pixel clock frequency for DS90UB925QSQ/NOPB?
The DS90UB925QSQ/NOPB supports PCLK frequencies from 5 MHz to 85 MHz, enabling transmission of 720p video at 60 Hz. Operation above 85 MHz is not supported and may result in data corruption or PLL unlock. This limit is defined by the serializer's internal encoding scheme and CML driver bandwidth, and is verified across the full −40 °C to +105 °C operating range per AEC-Q100 Grade 2 testing.
Does DS90UB925QSQ/NOPB support backward compatibility with FPD-Link II deserializers?
Yes, DS90UB925QSQ/NOPB supports backward compatibility with FPD-Link II deserializers such as DS90UR906Q and DS90UR908Q. This mode requires configuration via the MODE_SEL pin or register setting and disables certain FPD-Link III features like bidirectional control channel and advanced scrambling. DS90UB925QSQ/NOPB maintains functional interoperability but operates at reduced line efficiency in this mode.
How is the I²C slave address configured on DS90UB925QSQ/NOPB?
The I²C slave address of DS90UB925QSQ/NOPB is set using the IDx pin, which accepts an analog voltage divider formed by external resistors tied to VDD33 and GND. Valid addresses correspond to specific voltage thresholds (e.g., 0x20, 0x26, 0x28) documented in the SNLS407D datasheet Table 6. Floating IDx is prohibited; external pull-up to VDD33 is mandatory under all conditions.
What power supply sequencing is required for reliable startup of DS90UB925QSQ/NOPB?
DS90UB925QSQ/NOPB requires monotonic VDD33 and VDDIO ramps faster than 1.5 ms. VDD33 must reach regulation before VDDIO, and both supplies must stabilize prior to asserting PCLK. Failure to meet these conditions risks improper PLL initialization or register corruption. Decoupling capacitors-4.7 µF at each CAP pin and at VDD33/VDDIO-are mandatory per TI layout guidelines.
Can DS90UB925QSQ/NOPB transmit stereo I2S audio alongside video data?
Yes, DS90UB925QSQ/NOPB natively supports stereo I2S audio transport concurrent with RGB video. I2S_CLK, I2S_WC, and I2S_DA pins accept standard I2S signals, which are embedded into the FPD-Link III serial stream. Audio is transmitted with video timing alignment, preserving lip-sync accuracy. I2S_DB provides optional second-channel support in 18-bit color mode.
DS90UB925QSQ/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 48-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Serializer
- Data Rate:
- 2.975Gbps
- Input Type:
- LVCMOS
- Output Type:
- FPD-Link III, LVDS
- Number of Inputs:
- 24
- Number of Outputs:
- 1
- Voltage - Supply:
- 1.71V ~ 1.89V, 3V ~ 3.6V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-WQFN (7x7)
DS90UB925QSQ/NOPB FAQ
1.How can I place an order for DS90UB925QSQ/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for DS90UB925QSQ/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS90UB925QSQ/NOPB reliable?
The price and inventory of DS90UB925QSQ/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS90UB925QSQ/NOPB is usually 5 days.
3.What payment methods are accepted for DS90UB925QSQ/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS90UB925QSQ/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS90UB925QSQ/NOPB?
DS90UB925QSQ/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS90UB925QSQ/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS90UB925QSQ/NOPB?
For technical support, including DS90UB925QSQ/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS90UB925QSQ/NOPB requirements.
6.How does Aetrix verify that DS90UB925QSQ/NOPB is sourced from the original manufacturer or authorized distributors?
All DS90UB925QSQ/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS90UB925QSQ/NOPB meets industry standards.
7.What is the process for return or replacement of DS90UB925QSQ/NOPB?
All DS90UB925QSQ/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with DS90UB925QSQ/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS90UB925QSQ/NOPB part is unused and in its original packaging.
Return procedure for DS90UB925QSQ/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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