Texas Instruments DS90UB928QSQE/NOPB
- Part No.:
- DS90UB928QSQE/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Serializers, Deserializers
- Package:
- 48-WFQFN Exposed Pad
- Datasheet:
-
DS90UB928QSQE/NOPB.pdf
- Description:
- IC DESER BIDIR CTRL CHAN 48WQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
DS90UB928QSQE/NOPB from Texas Instruments is an automotive-grade FPD-Link III deserializer IC that converts high-speed serialized video/audio over a single AC-coupled STP pair into four LVDS data streams, one LVDS clock (OpenLDI), and up to four I2S audio outputs. It supports 720p RGB888 video with VS/HS/DE timing, 5–85 MHz pixel clock, and operates from a single 3.3 V supply with 1.8 V/3.3 V I/O compatibility.
For engineers reviewing the DS90UB928QSQE/NOPB datasheet, DS90UB928QSQE/NOPB pinout, DS90UB928QSQE/NOPB application, or DS90UB928QSQE/NOPB equivalent, this page delivers verified technical context, validated pin functions, real-world automotive display interface use cases, and two confirmed alternative deserializers with documented functional and layout implications.
Technical Context
The DS90UB928QSQE/NOPB implements adaptive cable equalization on its FPD-Link III serial input (RIN±) to compensate for up to 10-meter STP channel loss, and embeds a PLL that locks to incoming pixel clock frequencies from 5 MHz to 85 MHz. Its output stage generates four differential LVDS data pairs (TxOUT[3:0]±) and one LVDS clock pair (TxCLKOUT±), all compliant with OpenLDI (FPD-Link) standards and requiring external 100 Ω differential termination.
It integrates a bidirectional I²C-compatible control channel for register access, four configurable GPIOs (including two dedicated I²S data pins), and supports backward-compatible modes via MODE_SEL voltage divider configuration. The device provides BIST, image enhancement (white balance/dithering), and loop-through monitoring (CMLOUTP/N) for link diagnostics.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Video Support | 720p RGB888 + VS/HS/DE timing - enables direct connection to automotive LCD panels without external format conversion |
| Pixel Clock Range | 5 MHz to 85 MHz - covers standard definition through HD video rates with deterministic latency |
| Audio Interface | 4-channel I²S output (MCLK, I2S_CLK, I2S_WC, I2S_DA–DD) - supports surround sound routing to separate audio processors |
| Supply & I/O | Single 3.3 V VDD33 supply; 1.8 V or 3.3 V VDDIO - allows flexible interfacing with both legacy and low-voltage SoCs/GPUs |
| Cable Drive | AC-coupled STP interconnect up to 10 meters - eliminates DC bias concerns and enables long-reach infotainment links |
| ESD Rating | ±8 kV HBM, ±1.25 kV CDM - meets AEC-Q100 Grade 2 requirements for under-hood and cabin deployment |
| Thermal Resistance | RθJA = 26.4 °C/W (WQFN-48) - supports operation at 105°C ambient with standard PCB copper pour |
Pinout & Package
DS90UB928QSQE/NOPB uses a 48-pin WQFN package (7.0 mm × 7.0 mm, 0.4 mm pitch) with exposed thermal pad (DAP = GND). Pin functions are validated per TI SNLS417C Rev C datasheet, including dual-purpose I/Os and strict pull-up/pull-down requirements on configuration pins.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RIN+/RIN− | FPD-Link III Serial Input | Differential AC-coupled receiver with 100 Ω internal termination; requires 0.1 µF series capacitor per line |
| TxCLKOUT+/−, TxOUT[3:0]+/− | LVDS Video Output | OpenLDI-compliant outputs; each pair needs external 100 Ω differential termination to achieve 350 mV p-p swing |
| SCL/SDA | I²C Control Interface | Open-drain bus requiring 4.7 kΩ pullups to VDD33; supports register read/write for link setup and status monitoring |
| LOCK/PASS | Status Outputs | LOCK = active-high PLL lock indicator; PASS = BIST pass/fail flag - both drive LVCMOS loads directly |
| PDB | Power-Down Control | Active-high enable; must be pulled to VDD33 ≥3.0 V - forces tri-state outputs and shuts down PLL when low |
| MODE_SEL, MAPSEL, LFMODE | Configuration Inputs | Voltage-divider controlled pins selecting backward compatibility, LVDS map order, and low-frequency mode (5–15 MHz) |
Key Features
| Feature | Design Value |
|---|---|
| Adaptive Cable Equalization | Compensates for frequency-dependent loss in 10-meter STP cables, enabling robust link operation without manual tuning |
| Embedded Clock Recovery | PLL locks to incoming FPD-Link III stream with <40 ms lock time across full 5–85 MHz range - ensures fast display wake-up |
| DC-Balanced Scrambling | Reduces EMI by eliminating long DC runs; maintains signal integrity without requiring external encoding logic |
| Integrated Image Enhancement | On-chip white balance adjustment and dithering improve color fidelity and reduce banding on automotive LCDs |
| Loop-Through Monitor Outputs | CMLOUTP/N provide access to equalized forward-channel signal for oscilloscope-based link health verification |
| Bidirectional GPIO + I²S | Four LVCMOS GPIOs (two shared with I²S signals) allow host-side control of backlight, touch, or auxiliary sensors |
Applications
| Automotive Navigation Display | Rear Seat Entertainment |
|---|---|
|
Use Scenario: High-resolution 720p LCD panel mounted in center console, driven by graphics processor over long harness. IC Role / Device Role / Timing Role: Deserializes FPD-Link III stream from DS90UB927Q-Q1 serializer; outputs OpenLDI video + I²S audio to display timing controller and audio DAC. Use Value: Replaces bulky multi-pair LVDS cabling with single STP pair, reducing harness weight by >60% and eliminating skew-induced image artifacts. |
Use Scenario: Dual 720p displays in rear headrests fed from central infotainment unit via daisy-chained FPD-Link III links. IC Role / Device Role / Timing Role: Acts as repeater (REPEAT mode) to regenerate FPD-Link III signal while extracting local video/audio for each display. Use Value: Enables lossless signal regeneration over 10+ meter runs without external redrivers - simplifies wiring topology and improves EMI immunity. |
| Driver Monitoring System | ADAS Camera Interface |
|
Use Scenario: In-cabin camera feed processed by vision SoC and displayed on instrument cluster with minimal latency. IC Role / Device Role / Timing Role: Receives serialized video from DS90UB925Q-Q1 camera serializer; delivers synchronized RGB888 + DE/HS/VS to display controller. Use Value: Supports sub-frame latency (<1 ms) due to deterministic deserialization pipeline - critical for real-time driver attention alerts. |
Use Scenario: Front-facing megapixel camera feeding raw image data to ADAS domain controller over vehicle harness. IC Role / Device Role / Timing Role: Converts FPD-Link III stream to parallel LVDS for FPGA-based image preprocessing; provides I²S for embedded microphone array sync. Use Value: Delivers pixel-perfect 12-bit RGB data with <50 ps cycle-to-cycle jitter - preserves edge integrity for CNN-based object detection. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar FPD-Link III deserializer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS90UB948QSQE/NOPB | Supports 1080p (up to 112 MHz PCLK); adds eDP-compatible output mode and enhanced BIST | Required for Full HD displays; not pin-compatible - larger 64-pin WQFN, different power sequencing | Select when upgrading from 720p to 1080p or needing eDP fallback capability; redesign PCB layout and firmware initialization |
| MAX9276AEE/V+T | GMSL2-compatible; supports longer reach (15 m), higher ESD (±15 kV contact), but no integrated I²S audio | Used in premium vehicle platforms with GMSL2 ecosystem; requires external audio routing | Choose for GMSL2-aligned architectures or extreme ESD environments; add discrete audio interface if I²S required |
Compared with DS90UB928QSQE/NOPB, DS90UB948QSQE/NOPB extends resolution and adds protocol flexibility at the cost of layout change, while MAX9276AEE/V+T trades integrated audio for superior cable reach and ruggedness - neither is drop-in replaceable.
Availability
DS90UB928QSQE/NOPB is available at Aetrix Electronics and suitable for automotive navigation displays, rear seat entertainment systems, and ADAS camera interfaces requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for DS90UB928QSQE/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with deep expertise in automotive electronics and functional safety design.
The DS90UB928QSQE/NOPB belongs to TI's FPD-Link III serializer/deserializer product line, engineered specifically for high-reliability automotive infotainment and ADAS video links where EMI reduction, cable length, and AEC-Q100 compliance are mandatory.
FAQ
What is the primary function of the DS90UB928QSQE/NOPB in an automotive video system?
The DS90UB928QSQE/NOPB functions as an FPD-Link III deserializer that receives high-speed serialized video and audio over a single differential pair and outputs parallel LVDS video (OpenLDI), LVDS clock, and I²S audio. It enables compact, low-EMI cabling between graphics processors and displays in vehicles - a core building block in TI's automotive display interface ecosystem.
Does the DS90UB928QSQE/NOPB support both 1.8 V and 3.3 V I/O interfaces simultaneously?
No. The DS90UB928QSQE/NOPB uses a single VDDIO supply pin that must be set to either 1.8 V or 3.3 V - not both. All LVCMOS I/Os (GPIOs, I²S, control pins) operate at that selected voltage level. Mixing voltages on VDDIO is prohibited and violates absolute maximum ratings.
How does the DS90UB928QSQE/NOPB handle power-up sequencing, and what happens if PDB is not asserted correctly?
The DS90UB928QSQE/NOPB requires monotonic VDD33 and VDDIO ramps faster than 1.5 ms. PDB must be driven high (≥2.0 V) within this window to enable normal operation; if PDB remains low, the device enters power-down mode - tri-stating all outputs, shutting down the PLL, and resetting registers. Incorrect PDB timing causes boot failure or intermittent lock loss.
Can the DS90UB928QSQE/NOPB be used without external LVDS termination resistors?
No. The DS90UB928QSQE/NOPB's TxCLKOUT± and TxOUT[3:0]± outputs require external 100 Ω differential termination to achieve specified LVDS voltage swing (400–600 mV p-p) and signal integrity. Omitting these resistors results in reflections, degraded eye diagrams, and potential frame drops - TI explicitly mandates them in the datasheet pin descriptions.
What diagnostic capabilities does the DS90UB928QSQE/NOPB provide for field validation?
The DS90UB928QSQE/NOPB offers LOCK and PASS status pins, CMLOUTP/N loop-through monitor outputs, and built-in BIST with error-count reporting via I²C registers. These allow real-time verification of PLL lock, link integrity, equalizer performance, and bit-error-free transmission - essential for automotive production test and service diagnostics.
DS90UB928QSQE/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 48-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Deserializer
- Data Rate:
- 2.975Gbps
- Input Type:
- FPD-Link III, LVDS
- Output Type:
- LVDS
- Number of Inputs:
- 1
- Number of Outputs:
- 13
- Voltage - Supply:
- 3V ~ 3.6V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-WQFN (7x7)
DS90UB928QSQE/NOPB FAQ
1.How can I place an order for DS90UB928QSQE/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for DS90UB928QSQE/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS90UB928QSQE/NOPB reliable?
The price and inventory of DS90UB928QSQE/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS90UB928QSQE/NOPB is usually 5 days.
3.What payment methods are accepted for DS90UB928QSQE/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS90UB928QSQE/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DS90UB928QSQE/NOPB?
DS90UB928QSQE/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS90UB928QSQE/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS90UB928QSQE/NOPB?
For technical support, including DS90UB928QSQE/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS90UB928QSQE/NOPB requirements.
6.How does Aetrix verify that DS90UB928QSQE/NOPB is sourced from the original manufacturer or authorized distributors?
All DS90UB928QSQE/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS90UB928QSQE/NOPB meets industry standards.
7.What is the process for return or replacement of DS90UB928QSQE/NOPB?
All DS90UB928QSQE/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with DS90UB928QSQE/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS90UB928QSQE/NOPB part is unused and in its original packaging.
Return procedure for DS90UB928QSQE/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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