Texas Instruments DS90UB940NTNKDTQ1
- Part No.:
- DS90UB940NTNKDTQ1
- Manufacturer:
- Texas Instruments
- Category:
- Serializers, Deserializers
- Package:
- 64-WFQFN Exposed Pad
- Datasheet:
-
DS90UB940NTNKDTQ1.pdf
- Description:
- POWER MANAGEMENT
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
DS90UB940NTNKDTQ1 from Texas Instruments is an AEC-Q100 Grade 2 automotive FPD-Link III deserializer that converts 1- or 2-lane FPD-Link III serial streams into MIPI CSI-2 output, supporting up to 1080p60/170 MHz pixel clock with 24-bit color depth, adaptive equalization (–15.3 dB @ 1.7 GHz), and dual CSI-2 ports for automotive display systems.
For engineers reviewing the DS90UB940NTNKDTQ1 datasheet, DS90UB940NTNKDTQ1 pinout, DS90UB940NTNKDTQ1 application, or DS90UB940NTNKDTQ1 equivalent, key selection criteria include its dual-lane FPD-Link III RX interface, programmable 2-/4-lane CSI-2 TX output, integrated I2C/SPI control, AEC-Q100 qualification, and support for coaxial or STP interconnects in infotainment and cluster displays.
Technical Context
The DS90UB940NTNKDTQ1 implements a fully synchronized FPD-Link III receiver with automatic deskew and channel sensing-no training patterns required-and a dual-port MIPI D-PHY transmitter compliant with CSI-2 v1.3, supporting RGB888/YUV422/RAW12 video formats and programmable virtual channel IDs. It integrates adaptive receive equalization with temperature and cable aging compensation.
Its control architecture includes dual-mode I2C (master/slave, 1-Mbps fast-mode plus) and SPI (up to 3.3 Mbps), four high-speed GPIOs (2 Mbps), and configurable local I2S audio output (7.1 channels, 4 data lines), all operating across –40°C to +105°C ambient with dedicated 1.2-V, 1.8-V/3.3-V, and 3.3-V supply domains.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Pixel Clock Support | Up to 170 MHz (dual-link) enabling WUXGA/1080p60 @ 24-bit color - determines maximum video resolution and frame rate capability. |
| FPD-Link III Interface | 1- or 2-lane differential RX with automatic deskew - eliminates need for link training and tolerates PCB/cable skew mismatches. |
| CSI-2 Output | Selectable 2- or 4-lane per port (CSI0/CSI1), up to 1.3 Gbps/lane - enables flexible bandwidth allocation between camera/display subsystems. |
| Equalization Range | –15.3 dB insertion loss compensation at 1.7 GHz with auto temperature/cable aging adaptation - ensures robust signal integrity over long coaxial/STP cables. |
| Operating Temperature | AEC-Q100 Grade 2: –40°C to +105°C ambient - validated for under-hood and dashboard-mounted automotive display modules. |
| Power Supply Domains | VDD33 (3.3 V), VDDIO (1.8 V or 3.3 V), VDD12 (1.2 V) - enables low-noise analog/PHY operation and LVCMOS I/O compatibility with host processors. |
| I2C/SPI Control | I2C up to 1 Mbps (fast-mode plus), SPI up to 3.3 Mbps - supports real-time configuration and diagnostics without interrupting video streaming. |
Pinout & Package
DS90UB940NTNKDTQ1 uses a 64-pin WQFN package (9.0 mm × 9.0 mm) with exposed thermal pad (DAP) requiring ≥32 vias to ground plane. Power pins are segregated by domain (VDD33_A/B, VDDIO, VDD12_CSI0/1, etc.) to minimize noise coupling; CSI-2 and FPD-Link III I/Os are differential and require strict AC-coupling and 100-Ω termination.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RIN0+/RIN0− RIN1+/RIN1− | FPD-Link III differential RX inputs | Accept 1- or 2-lane serialized video/control; require AC-coupling and 100-Ω differential termination per TI Table 101. |
| CSI0_CLK±/CSI0_D0±–D3± CSI1_CLK±/CSI1_D0±–D3± | MIPI CSI-2 differential TX outputs | Programmable 2-/4-lane per port; unused lanes must be left unconnected (NC), not pulled. |
| I2C_SDA/I2C_SCL | Open-drain I2C bus interface | Supports master/slave mode up to 1 Mbps; requires external 2.2–4.7 kΩ pullup to VDDIO. |
| PDB | Inverted power-down control | Active-HIGH enable; internal 3 µA pulldown ensures safe power-down on startup until host asserts HIGH. |
| LOCK/PASS | Status monitoring outputs | LOCK = 1 confirms PLL lock; PASS = 1 indicates valid input timing - used for system-level fault detection and diagnostics. |
Key Features
| Feature | Design Value |
|---|---|
| Adaptive equalization | Compensates up to –15.3 dB channel loss at 1.7 GHz with automatic temperature and cable aging tracking - maintains signal integrity over vehicle lifetime. |
| Dual CSI-2 ports | Independent CSI0 and CSI1 outputs, each configurable for 2 or 4 lanes - enables simultaneous driving of dual displays or split processing paths. |
| Integrated I2S audio | Supports 7.1-channel audio with 4 data lines via programmable I2S pins (I2S_DA/DB/DC/DD/WC/CLK/MCLK) - eliminates need for separate audio transceivers in infotainment systems. |
| Automatic deskew | Real-time alignment of FPD-Link III lanes without training sequences - simplifies layout and eliminates skew-sensitive initialization routines. |
| AEC-Q100 Grade 2 | Qualified for –40°C to +105°C ambient operation with full electrical validation - meets automotive display module reliability requirements. |
Applications
| Automotive Center Stack Display | Rear Seat Entertainment |
|---|---|
Use Scenario: High-resolution video feed from media processor to central dashboard LCD using coaxial cabling. IC Role / Device Role / Timing Role: FPD-Link III deserializer converting serialized video to MIPI CSI-2 for SoC display interface. Use Value: Enables 1080p60 transmission over single coaxial cable with EMI reduction and minimal connector count. | Use Scenario: Dual-display rear-seat system receiving independent video streams from head unit. IC Role / Device Role / Timing Role: Dual-port deserializer routing one FPD-Link III stream to two independent CSI-2 outputs. Use Value: Eliminates duplicate deserializers; reduces BOM cost and board space while maintaining timing isolation. |
| Automotive Cluster Display | Automotive Smart Mirror Display |
Use Scenario: Instrument cluster rendering safety-critical graphics with low-latency video path. IC Role / Device Role / Timing Role: Deserializer with LOCK and PASS status outputs feeding diagnostic logic in MCU. Use Value: Real-time fault detection on display timing (DE/VSync mismatch) enables fail-safe UI behavior. | Use Scenario: HUD-integrated smart mirror displaying navigation and ADAS overlays. IC Role / Device Role / Timing Role: Deserializer supporting dual-lane FPD-Link III input and 4-lane CSI-2 output for high-bandwidth overlay rendering. Use Value: 170 MHz pixel clock support enables crisp 1280×480 HUD resolution with zero-frame-drop reliability. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar FPD-Link III deserializer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DS90UB947N-Q1 | Single-lane FPD-Link III RX only; no dual-link support; lower max pixel clock (96 MHz) | Targeted at 720p/WXGA displays only; lacks 1080p60 capability and second CSI-2 port | Select when cost and power are prioritized over resolution and dual-output flexibility. |
| DS90UB954N-Q1 | Supports FPD-Link IV (not III); higher bandwidth (2.1 Gbps/lane); different register map and pinout | Requires redesign for newer serializer compatibility; not drop-in for legacy FPD-Link III systems | Choose for next-gen platforms needing >170 MHz pixel clocks and enhanced ESD/EMI performance. |
Compared with DS90UB947N-Q1, DS90UB940NTNKDTQ1 delivers 77% higher pixel clock headroom and dual CSI-2 ports for multi-display architectures; versus DS90UB954N-Q1, it maintains full backward compatibility with existing FPD-Link III serializers like DS90UB949-Q1 without layout or firmware changes.
Availability
DS90UB940NTNKDTQ1 is available at Aetrix Electronics and suitable for automotive center stack displays, rear seat entertainment systems, and digital instrument clusters requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for DS90UB940NTNKDTQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company specializing in analog, embedded processing, and automotive ICs, with leadership in high-speed interface and automotive-grade signal chain solutions.
The DS90UB940NTNKDTQ1 belongs to TI's FPD-Link III automotive serializer/deserializer product line, designed specifically to replace LVDS-based video interconnects in automotive displays with lower EMI, reduced cable weight, and integrated control channel consolidation.
FAQ
What is the maximum supported pixel clock frequency for DS90UB940NTNKDTQ1 in dual-link mode?
The DS90UB940NTNKDTQ1 supports a maximum pixel clock frequency of 170 MHz in dual-link FPD-Link III mode, enabling WUXGA (1920×1200) and 1080p60 video resolutions with 24-bit color depth. This specification is validated across the full AEC-Q100 Grade 2 temperature range (–40°C to +105°C) and confirmed in the DS90UB940N-Q1 datasheet SNLS641 section 1.
Does DS90UB940NTNKDTQ1 support both coaxial and shielded twisted-pair (STP) cable interfaces?
Yes, DS90UB940NTNKDTQ1 supports both 50-Ω single-ended coaxial and 100-Ω differential shielded twisted-pair (STP) cables for FPD-Link III reception. The device's adaptive equalization automatically compensates for channel loss up to –15.3 dB at 1.7 GHz, ensuring robust operation across cable types and lengths as specified in the DS90UB940N-Q1 datasheet section 3.
How many MIPI CSI-2 lanes can DS90UB940NTNKDTQ1 output, and are they configurable per port?
DS90UB940NTNKDTQ1 provides two independent MIPI CSI-2 ports (CSI0 and CSI1), each configurable for either 2 or 4 differential data lanes plus clock, for a total of up to 8 CSI-2 lanes. Configuration is register-controlled and does not require hardware changes, allowing dynamic allocation based on display or image sensor requirements per the DS90UB940N-Q1 datasheet section 7.3.
What are the power supply requirements for DS90UB940NTNKDTQ1, and how are they segregated?
DS90UB940NTNKDTQ1 requires three distinct supply domains: VDD33 (3.0–3.6 V) for core logic and I2C/SPI interfaces, VDDIO (1.71–1.89 V or 3.0–3.6 V) for LVCMOS I/Os, and VDD12 (1.14–1.26 V) for analog/PHY circuitry including CSI-2 and FPD-Link III transceivers - all detailed in section 6.3 of the DS90UB940N-Q1 datasheet.
Is DS90UB940NTNKDTQ1 compatible with DS90UB949-Q1 serializers, and what interface standard do they share?
Yes, DS90UB940NTNKDTQ1 is fully compatible with DS90UB949-Q1 serializers as part of Texas Instruments' FPD-Link III ecosystem. They share the FPD-Link III standard (not LVDS or OpenLDI), supporting bidirectional control (I2C/SPI over same differential pairs), video scrambling, and automatic deskew - explicitly confirmed in the DS90UB940N-Q1 datasheet section 3 and functional block diagram.
DS90UB940NTNKDTQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 64-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Deserializer
- Data Rate:
- 3.36Gbps
- Input Type:
- FPD-Link III, LVDS
- Output Type:
- CSI-2, MIPI
- Number of Inputs:
- 2
- Number of Outputs:
- 4
- Voltage - Supply:
- 1.14V ~ 1.26V, 3V ~ 3.6V
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 64-WQFN (9x9)
DS90UB940NTNKDTQ1 FAQ
1.How can I place an order for DS90UB940NTNKDTQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for DS90UB940NTNKDTQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DS90UB940NTNKDTQ1 reliable?
The price and inventory of DS90UB940NTNKDTQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DS90UB940NTNKDTQ1 is usually 5 days.
3.What payment methods are accepted for DS90UB940NTNKDTQ1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DS90UB940NTNKDTQ1 transactions.
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4.How is shipping managed for DS90UB940NTNKDTQ1?
DS90UB940NTNKDTQ1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DS90UB940NTNKDTQ1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DS90UB940NTNKDTQ1?
For technical support, including DS90UB940NTNKDTQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DS90UB940NTNKDTQ1 requirements.
6.How does Aetrix verify that DS90UB940NTNKDTQ1 is sourced from the original manufacturer or authorized distributors?
All DS90UB940NTNKDTQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DS90UB940NTNKDTQ1 meets industry standards.
7.What is the process for return or replacement of DS90UB940NTNKDTQ1?
All DS90UB940NTNKDTQ1 units undergo pre-shipment inspection (PSI). If there is an issue with DS90UB940NTNKDTQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DS90UB940NTNKDTQ1 part is unused and in its original packaging.
Return procedure for DS90UB940NTNKDTQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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